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[mips] Splitting up class definition from implementation.
Also removed some unnecessary #includes. No functional changes. llvm-svn: 204320
This commit is contained in:
Matheus Almeida
parent
f3333428a5
commit
13fabbeda2
@ -11,155 +11,42 @@
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//
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//===----------------------------------------------------------------------===//
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//
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#define DEBUG_TYPE "mccodeemitter"
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#include "MCTargetDesc/MipsBaseInfo.h"
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#include "MipsMCCodeEmitter.h"
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#include "MCTargetDesc/MipsFixupKinds.h"
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#include "MCTargetDesc/MipsMCExpr.h"
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#include "MCTargetDesc/MipsMCTargetDesc.h"
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#include "llvm/ADT/APFloat.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/MC/MCCodeEmitter.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCFixup.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/raw_ostream.h"
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#define GET_INSTRMAP_INFO
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#include "MipsGenInstrInfo.inc"
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#undef GET_INSTRMAP_INFO
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using namespace llvm;
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namespace {
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class MipsMCCodeEmitter : public MCCodeEmitter {
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MipsMCCodeEmitter(const MipsMCCodeEmitter &) LLVM_DELETED_FUNCTION;
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void operator=(const MipsMCCodeEmitter &) LLVM_DELETED_FUNCTION;
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const MCInstrInfo &MCII;
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MCContext &Ctx;
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bool IsLittleEndian;
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bool isMicroMips(const MCSubtargetInfo &STI) const {
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return STI.getFeatureBits() & Mips::FeatureMicroMips;
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}
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public:
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MipsMCCodeEmitter(const MCInstrInfo &mcii, MCContext &Ctx_, bool IsLittle) :
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MCII(mcii), Ctx(Ctx_), IsLittleEndian(IsLittle) { }
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~MipsMCCodeEmitter() {}
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void EmitByte(unsigned char C, raw_ostream &OS) const {
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OS << (char)C;
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}
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void EmitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI,
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raw_ostream &OS) const {
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// Output the instruction encoding in little endian byte order.
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// Little-endian byte ordering:
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// mips32r2: 4 | 3 | 2 | 1
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// microMIPS: 2 | 1 | 4 | 3
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if (IsLittleEndian && Size == 4 && isMicroMips(STI)) {
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EmitInstruction(Val>>16, 2, STI, OS);
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EmitInstruction(Val, 2, STI, OS);
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} else {
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for (unsigned i = 0; i < Size; ++i) {
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unsigned Shift = IsLittleEndian ? i * 8 : (Size - 1 - i) * 8;
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EmitByte((Val >> Shift) & 0xff, OS);
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}
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}
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}
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void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getBinaryCodeForInstr - TableGen'erated function for getting the
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// binary encoding for an instruction.
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uint64_t getBinaryCodeForInstr(const MCInst &MI,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getBranchJumpOpValue - Return binary encoding of the jump
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// target operand. If the machine operand requires relocation,
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// record the relocation and return zero.
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unsigned getJumpTargetOpValue(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getBranchJumpOpValueMM - Return binary encoding of the microMIPS jump
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// target operand. If the machine operand requires relocation,
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// record the relocation and return zero.
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unsigned getJumpTargetOpValueMM(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getBranchTargetOpValue - Return binary encoding of the branch
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// target operand. If the machine operand requires relocation,
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// record the relocation and return zero.
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unsigned getBranchTargetOpValue(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getBranchTargetOpValue - Return binary encoding of the microMIPS branch
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// target operand. If the machine operand requires relocation,
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// record the relocation and return zero.
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unsigned getBranchTargetOpValueMM(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getMachineOpValue - Return binary encoding of operand. If the machin
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// operand requires relocation, record the relocation and return zero.
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unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getMSAMemEncoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getMemEncoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getMemEncodingMMImm12(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getSizeExtEncoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getSizeInsEncoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getLSAImmEncoding - Return binary encoding of LSA immediate.
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unsigned getLSAImmEncoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned
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getExprOpValue(const MCExpr *Expr,SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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}; // class MipsMCCodeEmitter
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} // namespace
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MCCodeEmitter *llvm::createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
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const MCRegisterInfo &MRI,
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const MCSubtargetInfo &STI,
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MCContext &Ctx)
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{
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namespace llvm {
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MCCodeEmitter *createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
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const MCRegisterInfo &MRI,
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const MCSubtargetInfo &STI,
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MCContext &Ctx) {
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return new MipsMCCodeEmitter(MCII, Ctx, false);
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}
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MCCodeEmitter *llvm::createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
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const MCRegisterInfo &MRI,
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const MCSubtargetInfo &STI,
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MCContext &Ctx)
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{
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MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
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const MCRegisterInfo &MRI,
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const MCSubtargetInfo &STI,
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MCContext &Ctx) {
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return new MipsMCCodeEmitter(MCII, Ctx, true);
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}
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} // End of namespace llvm.
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// If the D<shift> instruction has a shift amount that is greater
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// than 31 (checked in calling routine), lower it to a D<shift>32 instruction
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@ -226,6 +113,32 @@ static void LowerDextDins(MCInst& InstIn) {
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return;
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}
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bool MipsMCCodeEmitter::isMicroMips(const MCSubtargetInfo &STI) const {
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return STI.getFeatureBits() & Mips::FeatureMicroMips;
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}
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void MipsMCCodeEmitter::EmitByte(unsigned char C, raw_ostream &OS) const {
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OS << (char)C;
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}
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void MipsMCCodeEmitter::EmitInstruction(uint64_t Val, unsigned Size,
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const MCSubtargetInfo &STI,
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raw_ostream &OS) const {
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// Output the instruction encoding in little endian byte order.
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// Little-endian byte ordering:
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// mips32r2: 4 | 3 | 2 | 1
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// microMIPS: 2 | 1 | 4 | 3
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if (IsLittleEndian && Size == 4 && isMicroMips(STI)) {
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EmitInstruction(Val >> 16, 2, STI, OS);
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EmitInstruction(Val, 2, STI, OS);
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} else {
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for (unsigned i = 0; i < Size; ++i) {
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unsigned Shift = IsLittleEndian ? i * 8 : (Size - 1 - i) * 8;
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EmitByte((Val >> Shift) & 0xff, OS);
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}
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}
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}
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/// EncodeInstruction - Emit the instruction.
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/// Size the instruction with Desc.getSize().
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void MipsMCCodeEmitter::
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129
lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
Normal file
129
lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
Normal file
@ -0,0 +1,129 @@
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//===-- MipsMCCodeEmitter.h - Convert Mips Code to Machine Code -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the MipsMCCodeEmitter class.
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//
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//===----------------------------------------------------------------------===//
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//
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#ifndef MIPS_MC_CODE_EMITTER_H
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#define MIPS_MC_CODE_EMITTER_H
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#include "llvm/MC/MCCodeEmitter.h"
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#include "llvm/Support/DataTypes.h"
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using namespace llvm;
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// Forward declarations.
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namespace llvm {
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class MCContext;
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class MCExpr;
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class MCInst;
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class MCInstrInfo;
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class MCFixup;
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class MCOperand;
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class MCSubtargetInfo;
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class raw_ostream;
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}
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namespace {
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class MipsMCCodeEmitter : public MCCodeEmitter {
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MipsMCCodeEmitter(const MipsMCCodeEmitter &) LLVM_DELETED_FUNCTION;
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void operator=(const MipsMCCodeEmitter &) LLVM_DELETED_FUNCTION;
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const MCInstrInfo &MCII;
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MCContext &Ctx;
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bool IsLittleEndian;
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bool isMicroMips(const MCSubtargetInfo &STI) const;
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public:
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MipsMCCodeEmitter(const MCInstrInfo &mcii, MCContext &Ctx_, bool IsLittle)
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: MCII(mcii), Ctx(Ctx_), IsLittleEndian(IsLittle) {}
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~MipsMCCodeEmitter() {}
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void EmitByte(unsigned char C, raw_ostream &OS) const;
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void EmitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI,
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raw_ostream &OS) const;
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void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getBinaryCodeForInstr - TableGen'erated function for getting the
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// binary encoding for an instruction.
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uint64_t getBinaryCodeForInstr(const MCInst &MI,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getBranchJumpOpValue - Return binary encoding of the jump
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// target operand. If the machine operand requires relocation,
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// record the relocation and return zero.
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unsigned getJumpTargetOpValue(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getBranchJumpOpValueMM - Return binary encoding of the microMIPS jump
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// target operand. If the machine operand requires relocation,
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// record the relocation and return zero.
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unsigned getJumpTargetOpValueMM(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getBranchTargetOpValue - Return binary encoding of the branch
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// target operand. If the machine operand requires relocation,
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// record the relocation and return zero.
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unsigned getBranchTargetOpValue(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getBranchTargetOpValue - Return binary encoding of the microMIPS branch
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// target operand. If the machine operand requires relocation,
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// record the relocation and return zero.
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unsigned getBranchTargetOpValueMM(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getMachineOpValue - Return binary encoding of operand. If the machin
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// operand requires relocation, record the relocation and return zero.
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unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getMSAMemEncoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getMemEncoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getMemEncodingMMImm12(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getSizeExtEncoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getSizeInsEncoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getLSAImmEncoding - Return binary encoding of LSA immediate.
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unsigned getLSAImmEncoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getExprOpValue(const MCExpr *Expr, SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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}; // class MipsMCCodeEmitter
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} // namespace
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#endif
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