mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2025-02-21 21:11:36 +00:00
For extended loads of type i1 to i8, we will need to at least one byte from memory.
The change in the .td file is to mark the side effects of mov insn. llvm-svn: 74768
This commit is contained in:
parent
f74cd942cc
commit
1412c019ac
@ -841,12 +841,16 @@ SDValue PIC16TargetLowering::ExpandLoad(SDNode *N, SelectionDAG &DAG) {
|
||||
// i.e. without any extension
|
||||
MVT MemVT = LD->getMemoryVT();
|
||||
unsigned MemBytes = MemVT.getSizeInBits() / 8;
|
||||
// if MVT::i1 is extended to MVT::i8 then MemBytes will be zero
|
||||
// So set it to one
|
||||
if (MemBytes == 0) MemBytes = 1;
|
||||
|
||||
unsigned ExtdBytes = VT.getSizeInBits() / 8;
|
||||
Offset = DAG.getConstant(LoadOffset, MVT::i8);
|
||||
|
||||
Tys = DAG.getVTList(MVT::i8, MVT::Other);
|
||||
// For MemBytes generate PIC16Load with proper offset
|
||||
for (iter=0; iter<MemBytes; ++iter) {
|
||||
for (iter=0; iter < MemBytes; ++iter) {
|
||||
// Add the pointer offset if any
|
||||
Offset = DAG.getConstant(iter + LoadOffset, MVT::i8);
|
||||
Load = DAG.getNode(PIC16ISD::PIC16Load, dl, Tys, Chain, PtrLo, PtrHi,
|
||||
|
@ -299,7 +299,7 @@ def store_indirect :
|
||||
// Direct load.
|
||||
// Input Operands are: ptrlo = GA, offset = offset, ptrhi = banksel.
|
||||
// Output: dst = W
|
||||
let mayLoad = 1 in
|
||||
let Defs = [STATUS], mayLoad = 1 in
|
||||
class MOVF_INSN<bits<6> OpCode, SDNode OpNodeSrc, SDNode Op>:
|
||||
ByteFormat<0, (outs GPR:$dst),
|
||||
(ins i8imm:$offset, i8mem:$ptrlo, i8imm:$ptrhi),
|
||||
|
Loading…
x
Reference in New Issue
Block a user