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[AArch64] Add support for UDF instruction

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Summary: Add support for AArch64 UDF instruction.
UDF - Permanently Undefined generates an Undefined
Instruction exception (ESR_ELx.EC = 0b000000).

Reviewers: DavidSpickett, javed.absar, t.p.northover 

Reviewed By: javed.absar

Subscribers: nhaehnle, kristof.beyls

Differential Revision: https://reviews.llvm.org/D53319

llvm-svn: 345581
This commit is contained in:
Diogo N. Sampaio 2018-10-30 11:06:50 +00:00
parent f5d527dac9
commit 14e7c7404e
5 changed files with 81 additions and 10 deletions
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37
lib/Target/AArch64/AArch64InstrFormats.td
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@ -263,6 +263,14 @@ class SImmOperand<int width> : AsmOperandClass {
let PredicateMethod = "isSImm<" # width # ">";
}
class AsmImmRange<int Low, int High> : AsmOperandClass {
let Name = "Imm" # Low # "_" # High;
let DiagnosticType = "InvalidImm" # Low # "_" # High;
let RenderMethod = "addImmOperands";
let PredicateMethod = "isImmInRange<" # Low # "," # High # ">";
}
// Authenticated loads for v8.3 can have scaled 10-bit immediate offsets.
def SImm10s8Operand : SImmScaledMemoryIndexed<10, 8>;
def simm10Scaled : Operand<i64> {
@ -287,6 +295,10 @@ def uimm6 : Operand<i64>, ImmLeaf<i64, [{ return Imm >= 0 && Imm < 64; }]> {
let ParserMatchClass = UImm6Operand;
}
def uimm16 : Operand<i16>, ImmLeaf<i16, [{return Imm >= 0 && Imm < 65536;}]>{
let ParserMatchClass = AsmImmRange<0, 65535>;
}
def SImm9Operand : SImmOperand<9>;
def simm9 : Operand<i64>, ImmLeaf<i64, [{ return Imm >= -256 && Imm < 256; }]> {
let ParserMatchClass = SImm9Operand;
@ -447,13 +459,6 @@ def simm4s16 : Operand<i64>, ImmLeaf<i64,
let DecoderMethod = "DecodeSImm<4>";
}
class AsmImmRange<int Low, int High> : AsmOperandClass {
let Name = "Imm" # Low # "_" # High;
let DiagnosticType = "InvalidImm" # Low # "_" # High;
let RenderMethod = "addImmOperands";
let PredicateMethod = "isImmInRange<" # Low # "," # High # ">";
}
def Imm1_8Operand : AsmImmRange<1, 8>;
def Imm1_16Operand : AsmImmRange<1, 16>;
def Imm1_32Operand : AsmImmRange<1, 32>;
@ -708,11 +713,10 @@ def logical_imm64_not : Operand<i64> {
}
// imm0_65535 predicate - True if the immediate is in the range [0,65535].
def Imm0_65535Operand : AsmImmRange<0, 65535>;
def imm0_65535 : Operand<i32>, ImmLeaf<i32, [{
return ((uint32_t)Imm) < 65536;
}]> {
let ParserMatchClass = Imm0_65535Operand;
let ParserMatchClass = AsmImmRange<0, 65535>;
let PrintMethod = "printImmHex";
}
@ -1937,7 +1941,7 @@ class ADRI<bit page, string asm, Operand adr, list<dag> pattern>
//---
def movimm32_imm : Operand<i32> {
let ParserMatchClass = Imm0_65535Operand;
let ParserMatchClass = AsmImmRange<0, 65535>;
let EncoderMethod = "getMoveWideImmOpValue";
let PrintMethod = "printImm";
}
@ -4082,6 +4086,19 @@ class ExceptionGeneration<bits<3> op1, bits<2> ll, string asm>
let Inst{1-0} = ll;
}
//---
// UDF : Permanently UNDEFINED instructions. Format: Opc = 0x0000, 16 bit imm.
//--
let hasSideEffects = 1, isTrap = 1, mayLoad = 0, mayStore = 0 in {
class UDFType<bits<16> opc, string asm>
: I<(outs), (ins uimm16:$imm),
asm, "\t$imm", "", []>,
Sched<[]> {
bits<16> imm;
let Inst{31-16} = opc;
let Inst{15-0} = imm;
}
}
let Predicates = [HasFPARMv8] in {
//---

2
lib/Target/AArch64/AArch64InstrInfo.td
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@ -1630,6 +1630,8 @@ def : InstAlias<"dcps1", (DCPS1 0)>;
def : InstAlias<"dcps2", (DCPS2 0)>;
def : InstAlias<"dcps3", (DCPS3 0)>;
def UDF : UDFType<0, "udf">;
//===----------------------------------------------------------------------===//
// Load instructions.
//===----------------------------------------------------------------------===//

15
test/MC/AArch64/udf.s Normal file
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@ -0,0 +1,15 @@
# RUN: llvm-mc -assemble -show-encoding -triple=aarch64- %s | FileCheck %s
# CHECK: .text
# CHECK-NEXT: udf #0 // encoding: [0x00,0x00,0x00,0x00]
# CHECK-NEXT: udf #1 // encoding: [0x01,0x00,0x00,0x00]
# CHECK-NEXT: udf #16 // encoding: [0x10,0x00,0x00,0x00]
# CHECK-NEXT: udf #32 // encoding: [0x20,0x00,0x00,0x00]
# CHECK-NEXT: udf #48 // encoding: [0x30,0x00,0x00,0x00]
# CHECK-NEXT: udf #65535 // encoding: [0xff,0xff,0x00,0x00]
.text
udf 0
udf 1
udf 16
udf 32
udf 48
udf 65535

7
test/MC/AArch64/udf_not.s Normal file
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@ -0,0 +1,7 @@
# RUN: not llvm-mc -assemble -show-encoding -triple=aarch64- %s 2>&1 | FileCheck %s
udf 65536
udf -1
udf -768
# CHECK:{{.*}} immediate must be an integer in range [0, 65535].
# CHECK:{{.*}} immediate must be an integer in range [0, 65535].
# CHECK:{{.*}} immediate must be an integer in range [0, 65535].

30
test/MC/Disassembler/AArch64/udf.txt Normal file
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@ -0,0 +1,30 @@
# RUN: llvm-mc -arch aarch64 -disassemble -o - %s | FileCheck %s
# RUN: llvm-mc -arch aarch64 -disassemble -o - %s | \
# RUN: llvm-mc -assemble -filetype=obj -arch aarch64 -o - | \
# RUN: llvm-objdump -r -d --triple=arm64- - | \
# RUN: FileCheck %s -check-prefix=OBJ
[0x00,0x00,0x00,0x00]
[0x01,0x00,0x00,0x00]
[0x10,0x00,0x00,0x00]
[0x20,0x00,0x00,0x00]
[0x30,0x00,0x00,0x00]
[0xff,0xff,0x00,0x00]
[0x00,0xfd,0x00,0x00]
# CHECK: .text
# CHECK-NEXT: udf #0
# CHECK-NEXT: udf #1
# CHECK-NEXT: udf #16
# CHECK-NEXT: udf #32
# CHECK-NEXT: udf #48
# CHECK-NEXT: udf #32767
# CHECK-NEXT: udf #32000
#OBJ: Disassembly of section .text:
#OBJ-NEXT: $x.0:
#OBJ-NEXT: 0: 00 00 00 00 udf #0
#OBJ-NEXT: 4: 01 00 00 00 udf #1
#OBJ-NEXT: 8: 10 00 00 00 udf #16
#OBJ-NEXT: c: 20 00 00 00 udf #32
#OBJ-NEXT: 10: 30 00 00 00 udf #48
#OBJ-NEXT: 14: ff 7f 00 00 udf #32767
#OBJ-NEXT: 18: 00 7d 00 00 udf #32000