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Preserve volatililty and alignment information when lowering or
simplifying loads and stores. llvm-svn: 38473
This commit is contained in:
Dan Gohman
parent
65f3717db9
commit
150487b166
@ -2394,7 +2394,8 @@ SDOperand DAGCombiner::visitSIGN_EXTEND(SDNode *N) {
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LN0->getBasePtr(), LN0->getSrcValue(),
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LN0->getSrcValueOffset(),
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N0.getValueType(),
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LN0->isVolatile());
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LN0->isVolatile(),
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LN0->getAlignment());
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CombineTo(N, ExtLoad);
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CombineTo(N0.Val, DAG.getNode(ISD::TRUNCATE, N0.getValueType(), ExtLoad),
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ExtLoad.getValue(1));
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@ -2872,7 +2873,7 @@ SDOperand DAGCombiner::visitBIT_CONVERT(SDNode *N) {
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if (Align <= OrigAlign) {
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SDOperand Load = DAG.getLoad(VT, LN0->getChain(), LN0->getBasePtr(),
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LN0->getSrcValue(), LN0->getSrcValueOffset(),
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LN0->isVolatile(), LN0->getAlignment());
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LN0->isVolatile(), Align);
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AddToWorkList(N);
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CombineTo(N0.Val, DAG.getNode(ISD::BIT_CONVERT, N0.getValueType(), Load),
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Load.getValue(1));
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@ -3739,7 +3740,7 @@ SDOperand DAGCombiner::visitSTORE(SDNode *N) {
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getABITypeAlignment(MVT::getTypeForValueType(SVT));
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if (Align <= OrigAlign && TLI.isOperationLegal(ISD::STORE, SVT))
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return DAG.getStore(Chain, Value.getOperand(0), Ptr, ST->getSrcValue(),
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ST->getSrcValueOffset());
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ST->getSrcValueOffset(), ST->isVolatile(), Align);
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}
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// Turn 'store float 1.0, Ptr' -> 'store int 0x12345678, Ptr'
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@ -3752,14 +3753,16 @@ SDOperand DAGCombiner::visitSTORE(SDNode *N) {
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if (!AfterLegalize || TLI.isTypeLegal(MVT::i32)) {
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Tmp = DAG.getConstant(FloatToBits(CFP->getValue()), MVT::i32);
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return DAG.getStore(Chain, Tmp, Ptr, ST->getSrcValue(),
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ST->getSrcValueOffset());
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ST->getSrcValueOffset(), ST->isVolatile(),
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ST->getAlignment());
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}
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break;
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case MVT::f64:
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if (!AfterLegalize || TLI.isTypeLegal(MVT::i64)) {
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Tmp = DAG.getConstant(DoubleToBits(CFP->getValue()), MVT::i64);
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return DAG.getStore(Chain, Tmp, Ptr, ST->getSrcValue(),
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ST->getSrcValueOffset());
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ST->getSrcValueOffset(), ST->isVolatile(),
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ST->getAlignment());
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} else if (TLI.isTypeLegal(MVT::i32)) {
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// Many FP stores are not make apparent until after legalize, e.g. for
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// argument passing. Since this is so common, custom legalize the
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@ -3769,12 +3772,20 @@ SDOperand DAGCombiner::visitSTORE(SDNode *N) {
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SDOperand Hi = DAG.getConstant(Val >> 32, MVT::i32);
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if (!TLI.isLittleEndian()) std::swap(Lo, Hi);
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int SVOffset = ST->getSrcValueOffset();
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unsigned Alignment = ST->getAlignment();
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bool isVolatile = ST->isVolatile();
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SDOperand St0 = DAG.getStore(Chain, Lo, Ptr, ST->getSrcValue(),
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ST->getSrcValueOffset());
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ST->getSrcValueOffset(),
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isVolatile, ST->getAlignment());
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Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr,
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DAG.getConstant(4, Ptr.getValueType()));
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SVOffset += 4;
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if (Alignment > 4)
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Alignment = 4;
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SDOperand St1 = DAG.getStore(Chain, Hi, Ptr, ST->getSrcValue(),
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ST->getSrcValueOffset()+4);
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SVOffset, isVolatile, Alignment);
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return DAG.getNode(ISD::TokenFactor, MVT::Other, St0, St1);
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}
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break;
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@ -3792,10 +3803,12 @@ SDOperand DAGCombiner::visitSTORE(SDNode *N) {
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SDOperand ReplStore;
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if (ST->isTruncatingStore()) {
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ReplStore = DAG.getTruncStore(BetterChain, Value, Ptr,
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ST->getSrcValue(),ST->getSrcValueOffset(), ST->getStoredVT());
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ST->getSrcValue(), ST->getSrcValueOffset(), ST->getStoredVT(),
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ST->isVolatile(), ST->getAlignment());
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} else {
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ReplStore = DAG.getStore(BetterChain, Value, Ptr,
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ST->getSrcValue(), ST->getSrcValueOffset());
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ST->getSrcValue(), ST->getSrcValueOffset(),
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ST->isVolatile(), ST->getAlignment());
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}
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// Create token to keep both nodes around.
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@ -1500,7 +1500,8 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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MVT::ValueType NVT = TLI.getTypeToPromoteTo(Node->getOpcode(), VT);
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Tmp1 = DAG.getLoad(NVT, Tmp1, Tmp2, LD->getSrcValue(),
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LD->getSrcValueOffset());
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LD->getSrcValueOffset(),
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LD->isVolatile(), LD->getAlignment());
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Tmp3 = LegalizeOp(DAG.getNode(ISD::BIT_CONVERT, VT, Tmp1));
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Tmp4 = LegalizeOp(Tmp1.getValue(1));
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break;
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@ -1520,7 +1521,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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"Can only promote extending LOAD from i1 -> i8!");
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Result = DAG.getExtLoad(ExtType, Node->getValueType(0), Tmp1, Tmp2,
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LD->getSrcValue(), LD->getSrcValueOffset(),
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MVT::i8);
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MVT::i8, LD->isVolatile(), LD->getAlignment());
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Tmp1 = Result.getValue(0);
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Tmp2 = Result.getValue(1);
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break;
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@ -1544,7 +1545,8 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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// f64 = EXTLOAD f32 should expand to LOAD, FP_EXTEND
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if (SrcVT == MVT::f32 && Node->getValueType(0) == MVT::f64) {
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SDOperand Load = DAG.getLoad(SrcVT, Tmp1, Tmp2, LD->getSrcValue(),
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LD->getSrcValueOffset());
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LD->getSrcValueOffset(),
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LD->isVolatile(), LD->getAlignment());
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Result = DAG.getNode(ISD::FP_EXTEND, Node->getValueType(0), Load);
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Tmp1 = LegalizeOp(Result); // Relegalize new nodes.
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Tmp2 = LegalizeOp(Load.getValue(1));
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@ -1555,7 +1557,8 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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// zero/sign extend inreg.
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Result = DAG.getExtLoad(ISD::EXTLOAD, Node->getValueType(0),
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Tmp1, Tmp2, LD->getSrcValue(),
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LD->getSrcValueOffset(), SrcVT);
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LD->getSrcValueOffset(), SrcVT,
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LD->isVolatile(), LD->getAlignment());
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SDOperand ValRes;
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if (ExtType == ISD::SEXTLOAD)
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ValRes = DAG.getNode(ISD::SIGN_EXTEND_INREG, Result.getValueType(),
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@ -1753,6 +1756,9 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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StoreSDNode *ST = cast<StoreSDNode>(Node);
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Tmp1 = LegalizeOp(ST->getChain()); // Legalize the chain.
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Tmp2 = LegalizeOp(ST->getBasePtr()); // Legalize the pointer.
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int SVOffset = ST->getSrcValueOffset();
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unsigned Alignment = ST->getAlignment();
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bool isVolatile = ST->isVolatile();
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if (!ST->isTruncatingStore()) {
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// Turn 'store float 1.0, Ptr' -> 'store int 0x12345678, Ptr'
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@ -1769,7 +1775,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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Tmp3 = DAG.getConstant(DoubleToBits(CFP->getValue()), MVT::i64);
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}
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Result = DAG.getStore(Tmp1, Tmp3, Tmp2, ST->getSrcValue(),
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ST->getSrcValueOffset());
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SVOffset, isVolatile, Alignment);
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break;
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}
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@ -1792,7 +1798,8 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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Tmp3 = DAG.getNode(ISD::BIT_CONVERT,
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TLI.getTypeToPromoteTo(ISD::STORE, VT), Tmp3);
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Result = DAG.getStore(Tmp1, Tmp3, Tmp2,
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ST->getSrcValue(), ST->getSrcValueOffset());
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ST->getSrcValue(), SVOffset, isVolatile,
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Alignment);
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break;
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}
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break;
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@ -1801,7 +1808,8 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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// Truncate the value and store the result.
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Tmp3 = PromoteOp(ST->getValue());
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Result = DAG.getTruncStore(Tmp1, Tmp3, Tmp2, ST->getSrcValue(),
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ST->getSrcValueOffset(), ST->getStoredVT());
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SVOffset, ST->getStoredVT(),
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isVolatile, Alignment);
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break;
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case Expand:
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@ -1823,18 +1831,14 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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// Turn this into a normal store of the vector type.
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Tmp3 = LegalizeOp(Node->getOperand(1));
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Result = DAG.getStore(Tmp1, Tmp3, Tmp2, ST->getSrcValue(),
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ST->getSrcValueOffset(),
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ST->isVolatile(),
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ST->getAlignment());
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SVOffset, isVolatile, Alignment);
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Result = LegalizeOp(Result);
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break;
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} else if (NumElems == 1) {
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// Turn this into a normal store of the scalar type.
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Tmp3 = ScalarizeVectorOp(Node->getOperand(1));
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Result = DAG.getStore(Tmp1, Tmp3, Tmp2, ST->getSrcValue(),
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ST->getSrcValueOffset(),
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ST->isVolatile(),
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ST->getAlignment());
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SVOffset, isVolatile, Alignment);
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// The scalarized value type may not be legal, e.g. it might require
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// promotion or expansion. Relegalize the scalar store.
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Result = LegalizeOp(Result);
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@ -1852,8 +1856,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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}
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Lo = DAG.getStore(Tmp1, Lo, Tmp2, ST->getSrcValue(),
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ST->getSrcValueOffset(), ST->isVolatile(),
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ST->getAlignment());
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SVOffset, isVolatile, Alignment);
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if (Hi.Val == NULL) {
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// Must be int <-> float one-to-one expansion.
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@ -1865,11 +1868,11 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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getIntPtrConstant(IncrementSize));
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assert(isTypeLegal(Tmp2.getValueType()) &&
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"Pointers must be legal!");
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// FIXME: This sets the srcvalue of both halves to be the same, which is
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// wrong.
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SVOffset += IncrementSize;
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if (Alignment > IncrementSize)
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Alignment = IncrementSize;
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Hi = DAG.getStore(Tmp1, Hi, Tmp2, ST->getSrcValue(),
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ST->getSrcValueOffset(), ST->isVolatile(),
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std::min(ST->getAlignment(), IncrementSize));
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SVOffset, isVolatile, Alignment);
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Result = DAG.getNode(ISD::TokenFactor, MVT::Other, Lo, Hi);
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break;
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}
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@ -1887,7 +1890,8 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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Tmp3 = DAG.getNode(ISD::AND, Tmp3.getValueType(), Tmp3,
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DAG.getConstant(1, Tmp3.getValueType()));
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Result = DAG.getTruncStore(Tmp1, Tmp3, Tmp2, ST->getSrcValue(),
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ST->getSrcValueOffset(), MVT::i8);
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SVOffset, MVT::i8,
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isVolatile, Alignment);
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} else if (Tmp1 != ST->getChain() || Tmp3 != ST->getValue() ||
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Tmp2 != ST->getBasePtr()) {
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Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp3, Tmp2,
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@ -3494,7 +3498,9 @@ SDOperand SelectionDAGLegalize::PromoteOp(SDOperand Op) {
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Result = DAG.getExtLoad(ExtType, NVT,
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LD->getChain(), LD->getBasePtr(),
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LD->getSrcValue(), LD->getSrcValueOffset(),
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LD->getLoadedVT());
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LD->getLoadedVT(),
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LD->isVolatile(),
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LD->getAlignment());
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// Remember that we legalized the chain.
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AddLegalizedOperand(Op.getValue(1), LegalizeOp(Result.getValue(1)));
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break;
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@ -4848,10 +4854,13 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){
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SDOperand Ch = LD->getChain(); // Legalize the chain.
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SDOperand Ptr = LD->getBasePtr(); // Legalize the pointer.
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ISD::LoadExtType ExtType = LD->getExtensionType();
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unsigned SVOffset = LD->getSrcValueOffset();
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int SVOffset = LD->getSrcValueOffset();
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unsigned Alignment = LD->getAlignment();
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bool isVolatile = LD->isVolatile();
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if (ExtType == ISD::NON_EXTLOAD) {
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Lo = DAG.getLoad(NVT, Ch, Ptr, LD->getSrcValue(), SVOffset);
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Lo = DAG.getLoad(NVT, Ch, Ptr, LD->getSrcValue(), SVOffset,
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isVolatile, Alignment);
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if (VT == MVT::f32 || VT == MVT::f64) {
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// f32->i32 or f64->i64 one to one expansion.
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// Remember that we legalized the chain.
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@ -4867,7 +4876,10 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){
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Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr,
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getIntPtrConstant(IncrementSize));
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SVOffset += IncrementSize;
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Hi = DAG.getLoad(NVT, Ch, Ptr, LD->getSrcValue(), SVOffset);
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if (Alignment > IncrementSize)
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Alignment = IncrementSize;
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Hi = DAG.getLoad(NVT, Ch, Ptr, LD->getSrcValue(), SVOffset,
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isVolatile, Alignment);
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// Build a factor node to remember that this load is independent of the
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// other one.
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@ -4884,7 +4896,7 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){
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if (VT == MVT::f64 && EVT == MVT::f32) {
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// f64 = EXTLOAD f32 should expand to LOAD, FP_EXTEND
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SDOperand Load = DAG.getLoad(EVT, Ch, Ptr, LD->getSrcValue(),
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SVOffset);
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SVOffset, isVolatile, Alignment);
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// Remember that we legalized the chain.
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AddLegalizedOperand(SDOperand(Node, 1), LegalizeOp(Load.getValue(1)));
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ExpandOp(DAG.getNode(ISD::FP_EXTEND, VT, Load), Lo, Hi);
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@ -4893,10 +4905,11 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){
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if (EVT == NVT)
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Lo = DAG.getLoad(NVT, Ch, Ptr, LD->getSrcValue(),
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SVOffset);
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SVOffset, isVolatile, Alignment);
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else
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Lo = DAG.getExtLoad(ExtType, NVT, Ch, Ptr, LD->getSrcValue(),
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SVOffset, EVT);
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SVOffset, EVT, isVolatile,
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Alignment);
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// Remember that we legalized the chain.
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AddLegalizedOperand(SDOperand(Node, 1), LegalizeOp(Lo.getValue(1)));
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