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Add a note about a potential optimization for clz/ctz patterns for ARM

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(and other targets).

llvm-svn: 149182
This commit is contained in:
Bob Wilson 2012-01-28 18:30:07 +00:00
parent b586b7c9c7
commit 157561c941
1 changed files with 16 additions and 0 deletions
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16
lib/Target/ARM/README.txt
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@ -699,3 +699,19 @@ test is equality test so it's more a conditional move rather than a select:
Currently this is a ARM specific dag combine. We probably should make it into a
target-neutral one.
//===---------------------------------------------------------------------===//
Optimize unnecessary checks for zero with __builtin_clz/ctz. Those builtins
are specified to be undefined at zero, so portable code must check for zero
and handle it as a special case. That is unnecessary on ARM where those
operations are implemented in a way that is well-defined for zero. For
example:
int f(int x) { return x ? __builtin_clz(x) : sizeof(int)*8; }
should just be implemented with a CLZ instruction. Since there are other
targets, e.g., PPC, that share this behavior, it would be best to implement
this in a target-independent way: we should probably fold that (when using
"undefined at zero" semantics) to set the "defined at zero" bit and have
the code generator expand out the right code.