Change -prefer-32bit-thumb to attribute -mattr=+32bit instead to disable more 32-bit to 16-bit optimizations.

llvm-svn: 110584
This commit is contained in:
Evan Cheng 2010-08-09 18:35:19 +00:00
parent 6a92e01d05
commit 15d23d4966
4 changed files with 10 additions and 8 deletions

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@ -65,6 +65,9 @@ def FeatureNEONForFP : SubtargetFeature<"neonfp", "UseNEONForSinglePrecisionFP",
"true", "true",
"Use NEON for single precision FP">; "Use NEON for single precision FP">;
// Disable 32-bit to 16-bit narrowing for experimentation.
def FeaturePref32BitThumb : SubtargetFeature<"32bit", "Pref32BitThumb", "true",
"Prefer 32-bit Thumb instrs">;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// ARM Processors supported. // ARM Processors supported.

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@ -357,7 +357,7 @@ bool ARMConstantIslands::runOnMachineFunction(MachineFunction &MF) {
} }
// Shrink 32-bit Thumb2 branch, load, and store instructions. // Shrink 32-bit Thumb2 branch, load, and store instructions.
if (isThumb2) if (isThumb2 && !STI->prefers32BitThumb())
MadeChange |= OptimizeThumb2Instructions(MF); MadeChange |= OptimizeThumb2Instructions(MF);
// After a while, this might be made debug-only, but it is not expensive. // After a while, this might be made debug-only, but it is not expensive.

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@ -84,6 +84,10 @@ protected:
/// instructions. /// instructions.
bool HasT2ExtractPack; bool HasT2ExtractPack;
/// Pref32BitThumb - If true, codegen would prefer 32-bit Thumb instructions
/// over 16-bit ones.
bool Pref32BitThumb;
/// stackAlignment - The minimum alignment known to hold of the stack frame on /// stackAlignment - The minimum alignment known to hold of the stack frame on
/// entry to the function and which must be maintained by every function. /// entry to the function and which must be maintained by every function.
unsigned stackAlignment; unsigned stackAlignment;
@ -137,6 +141,7 @@ protected:
bool hasT2ExtractPack() const { return HasT2ExtractPack; } bool hasT2ExtractPack() const { return HasT2ExtractPack; }
bool useVMLx() const {return hasVFP2() && !SlowVMLx; } bool useVMLx() const {return hasVFP2() && !SlowVMLx; }
bool isFPBrccSlow() const { return SlowFPBrcc; } bool isFPBrccSlow() const { return SlowFPBrcc; }
bool prefers32BitThumb() const { return Pref32BitThumb; }
bool hasFP16() const { return HasFP16; } bool hasFP16() const { return HasFP16; }

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@ -16,17 +16,11 @@
#include "ARM.h" #include "ARM.h"
#include "llvm/PassManager.h" #include "llvm/PassManager.h"
#include "llvm/CodeGen/Passes.h" #include "llvm/CodeGen/Passes.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/FormattedStream.h" #include "llvm/Support/FormattedStream.h"
#include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetRegistry.h" #include "llvm/Target/TargetRegistry.h"
using namespace llvm; using namespace llvm;
static cl::opt<bool>
Prefer32BitThumbInstrs("prefer-32bit-thumb",
cl::desc("Prefer 32-bit Thumb instructions"),
cl::init(false));
static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) { static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
Triple TheTriple(TT); Triple TheTriple(TT);
switch (TheTriple.getOS()) { switch (TheTriple.getOS()) {
@ -143,7 +137,7 @@ bool ARMBaseTargetMachine::addPreSched2(PassManagerBase &PM,
bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM, bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
CodeGenOpt::Level OptLevel) { CodeGenOpt::Level OptLevel) {
if (!Prefer32BitThumbInstrs && Subtarget.isThumb2()) if (Subtarget.isThumb2() && !Subtarget.prefers32BitThumb())
PM.add(createThumb2SizeReductionPass()); PM.add(createThumb2SizeReductionPass());
PM.add(createARMConstantIslandPass()); PM.add(createARMConstantIslandPass());