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Fix code that assumes the register info will be dumped into a target
namespace instead of the reg class namespace. Update getRegClassForType() to use modified names due to tblgen change. llvm-svn: 22923
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47005fe346
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15d2e8a253
@ -26,12 +26,12 @@ SparcV8RegisterInfo::SparcV8RegisterInfo()
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V8::ADJCALLSTACKUP) {}
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static const TargetRegisterClass *getClass(unsigned SrcReg) {
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if (SparcV8::IntRegsRegisterClass->contains(SrcReg))
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return SparcV8::IntRegsRegisterClass;
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else if (SparcV8::FPRegsRegisterClass->contains(SrcReg))
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return SparcV8::FPRegsRegisterClass;
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else if (SparcV8::DFPRegsRegisterClass->contains(SrcReg))
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return SparcV8::DFPRegsRegisterClass;
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if (V8::IntRegsRegisterClass->contains(SrcReg))
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return V8::IntRegsRegisterClass;
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else if (V8::FPRegsRegisterClass->contains(SrcReg))
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return V8::FPRegsRegisterClass;
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else if (V8::DFPRegsRegisterClass->contains(SrcReg))
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return V8::DFPRegsRegisterClass;
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else {
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std::cerr << "Error: register of unknown class found: " << SrcReg << "\n";
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abort ();
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@ -44,13 +44,13 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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const TargetRegisterClass *RC = getClass(SrcReg);
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// On the order of operands here: think "[FrameIdx + 0] = SrcReg".
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if (RC == SparcV8::IntRegsRegisterClass)
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if (RC == V8::IntRegsRegisterClass)
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BuildMI (MBB, I, V8::ST, 3).addFrameIndex (FrameIdx).addSImm (0)
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.addReg (SrcReg);
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else if (RC == SparcV8::FPRegsRegisterClass)
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else if (RC == V8::FPRegsRegisterClass)
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BuildMI (MBB, I, V8::STFri, 3).addFrameIndex (FrameIdx).addSImm (0)
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.addReg (SrcReg);
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else if (RC == SparcV8::DFPRegsRegisterClass)
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else if (RC == V8::DFPRegsRegisterClass)
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BuildMI (MBB, I, V8::STDFri, 3).addFrameIndex (FrameIdx).addSImm (0)
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.addReg (SrcReg);
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else
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@ -61,12 +61,12 @@ void SparcV8RegisterInfo::
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loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned DestReg, int FrameIdx) const {
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const TargetRegisterClass *RC = getClass(DestReg);
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if (RC == SparcV8::IntRegsRegisterClass)
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if (RC == V8::IntRegsRegisterClass)
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BuildMI (MBB, I, V8::LD, 2, DestReg).addFrameIndex (FrameIdx).addSImm (0);
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else if (RC == SparcV8::FPRegsRegisterClass)
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else if (RC == V8::FPRegsRegisterClass)
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BuildMI (MBB, I, V8::LDFri, 2, DestReg).addFrameIndex (FrameIdx)
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.addSImm (0);
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else if (RC == SparcV8::DFPRegsRegisterClass)
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else if (RC == V8::DFPRegsRegisterClass)
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BuildMI (MBB, I, V8::LDDFri, 2, DestReg).addFrameIndex (FrameIdx)
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.addSImm (0);
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else
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@ -77,11 +77,11 @@ void SparcV8RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const {
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if (RC == SparcV8::IntRegsRegisterClass)
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if (RC == V8::IntRegsRegisterClass)
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BuildMI (MBB, I, V8::ORrr, 2, DestReg).addReg (V8::G0).addReg (SrcReg);
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else if (RC == SparcV8::FPRegsRegisterClass)
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else if (RC == V8::FPRegsRegisterClass)
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BuildMI (MBB, I, V8::FMOVS, 1, DestReg).addReg (SrcReg);
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else if (RC == SparcV8::DFPRegsRegisterClass)
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else if (RC == V8::DFPRegsRegisterClass)
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BuildMI (MBB, I, V8::FpMOVD, 1, DestReg).addReg (SrcReg);
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else
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assert (0 && "Can't copy this register");
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@ -158,8 +158,8 @@ void SparcV8RegisterInfo::emitEpilogue(MachineFunction &MF,
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const TargetRegisterClass*
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SparcV8RegisterInfo::getRegClassForType(const Type* Ty) const {
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switch (Ty->getTypeID()) {
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case Type::FloatTyID: return &FPRegsInstance;
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case Type::DoubleTyID: return &DFPRegsInstance;
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case Type::FloatTyID: return V8::FPRegsRegisterClass;
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case Type::DoubleTyID: return V8::DFPRegsRegisterClass;
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case Type::LongTyID:
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case Type::ULongTyID: assert(0 && "Long values do not fit in registers!");
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default: assert(0 && "Invalid type to getClass!");
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@ -170,7 +170,7 @@ SparcV8RegisterInfo::getRegClassForType(const Type* Ty) const {
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case Type::UShortTyID:
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case Type::IntTyID:
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case Type::UIntTyID:
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case Type::PointerTyID: return &IntRegsInstance;
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case Type::PointerTyID: return V8::IntRegsRegisterClass;
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}
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}
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