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[RISCV] Fixed setting predicates for compressed instructions.
Summary: Fixed setting predicates for compressed instructions. Some instructions were being generated with C extension enabled only, without proper checks for the other required extensions like F, D and 32 and 64-bit target checks. Affected instructions: C_FLD, C_FLW, C_LD, C_FSD, C_FSW, C_SD, C_JAL, C_ADDIW, C_SUBW, C_ADDW, C_FLDSP, C_FLWSP, C_LDSP, C_FSDSP, C_FSWSP, C_SDSP Reviewers: asb, shiva0217 Reviewed By: asb Subscribers: rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, llvm-commits Differential Revision: https://reviews.llvm.org/D42132 llvm-svn: 322876
This commit is contained in:
Ana Pazos
parent
112ca3e80a
commit
168aa8b81a
@ -188,8 +188,8 @@ def C_ADDI4SPN : RVInst16CIW<0b000, 0b00, (outs GPRC:$rd),
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let Inst{5} = imm{3};
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}
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def C_FLD : CLoad_ri<0b001, "c.fld", FPR64C, uimm8_lsb000>,
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Requires<[HasStdExtD]> {
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let Predicates = [HasStdExtC, HasStdExtD] in
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def C_FLD : CLoad_ri<0b001, "c.fld", FPR64C, uimm8_lsb000> {
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bits<8> imm;
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let Inst{12-10} = imm{5-3};
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let Inst{6-5} = imm{7-6};
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@ -202,24 +202,24 @@ def C_LW : CLoad_ri<0b010, "c.lw", GPRC, uimm7_lsb00> {
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let Inst{5} = imm{6};
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}
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let DecoderNamespace = "RISCV32Only_" in
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def C_FLW : CLoad_ri<0b011, "c.flw", FPR32C, uimm7_lsb00>,
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Requires<[HasStdExtF, IsRV32]> {
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let DecoderNamespace = "RISCV32Only_",
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Predicates = [HasStdExtC, HasStdExtF, IsRV32] in
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def C_FLW : CLoad_ri<0b011, "c.flw", FPR32C, uimm7_lsb00> {
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bits<7> imm;
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let Inst{12-10} = imm{5-3};
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let Inst{6} = imm{2};
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let Inst{5} = imm{6};
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}
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def C_LD : CLoad_ri<0b011, "c.ld", GPRC, uimm8_lsb000>,
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Requires<[IsRV64]> {
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let Predicates = [HasStdExtC, IsRV64] in
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def C_LD : CLoad_ri<0b011, "c.ld", GPRC, uimm8_lsb000> {
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bits<8> imm;
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let Inst{12-10} = imm{5-3};
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let Inst{6-5} = imm{7-6};
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}
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def C_FSD : CStore_rri<0b101, "c.fsd", FPR64C, uimm8_lsb000>,
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Requires<[HasStdExtD]> {
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let Predicates = [HasStdExtC, HasStdExtD] in
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def C_FSD : CStore_rri<0b101, "c.fsd", FPR64C, uimm8_lsb000> {
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bits<8> imm;
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let Inst{12-10} = imm{5-3};
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let Inst{6-5} = imm{7-6};
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@ -232,17 +232,17 @@ def C_SW : CStore_rri<0b110, "c.sw", GPRC, uimm7_lsb00> {
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let Inst{5} = imm{6};
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}
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let DecoderNamespace = "RISCV32Only_" in
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def C_FSW : CStore_rri<0b111, "c.fsw", FPR32C, uimm7_lsb00>,
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Requires<[HasStdExtF, IsRV32]> {
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let DecoderNamespace = "RISCV32Only_",
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Predicates = [HasStdExtC, HasStdExtF, IsRV32] in
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def C_FSW : CStore_rri<0b111, "c.fsw", FPR32C, uimm7_lsb00> {
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bits<7> imm;
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let Inst{12-10} = imm{5-3};
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let Inst{6} = imm{2};
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let Inst{5} = imm{6};
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}
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def C_SD : CStore_rri<0b111, "c.sd", GPRC, uimm8_lsb000>,
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Requires<[IsRV64]> {
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let Predicates = [HasStdExtC, IsRV64] in
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def C_SD : CStore_rri<0b111, "c.sd", GPRC, uimm8_lsb000> {
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bits<8> imm;
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let Inst{12-10} = imm{5-3};
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let Inst{6-5} = imm{7-6};
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@ -260,16 +260,16 @@ def C_ADDI : RVInst16CI<0b000, 0b01, (outs GPRNoX0:$rd_wb),
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}
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let hasSideEffects = 0, mayLoad = 0, mayStore = 0, isCall = 1,
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DecoderNamespace = "RISCV32Only_", Defs = [X1] in
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DecoderNamespace = "RISCV32Only_", Defs = [X1],
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Predicates = [HasStdExtC, IsRV32] in
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def C_JAL : RVInst16CJ<0b001, 0b01, (outs), (ins simm12_lsb0:$offset),
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"c.jal", "$offset">,
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Requires<[IsRV32]>;
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"c.jal", "$offset">;
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let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
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let hasSideEffects = 0, mayLoad = 0, mayStore = 0,
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Predicates = [HasStdExtC, IsRV64] in
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def C_ADDIW : RVInst16CI<0b001, 0b01, (outs GPRNoX0:$rd_wb),
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(ins GPRNoX0:$rd, simm6:$imm),
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"c.addiw", "$rd, $imm">,
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Requires<[IsRV64]> {
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"c.addiw", "$rd, $imm"> {
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let Constraints = "$rd = $rd_wb";
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let Inst{6-2} = imm{4-0};
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}
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@ -317,8 +317,10 @@ def C_XOR : CS_ALU<0b01, "c.xor", GPRC, 0>;
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def C_OR : CS_ALU<0b10, "c.or" , GPRC, 0>;
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def C_AND : CS_ALU<0b11, "c.and", GPRC, 0>;
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def C_SUBW : CS_ALU<0b00, "c.subw", GPRC, 1>, Requires<[IsRV64]>;
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def C_ADDW : CS_ALU<0b01, "c.addw", GPRC, 1>, Requires<[IsRV64]>;
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let Predicates = [HasStdExtC, IsRV64] in {
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def C_SUBW : CS_ALU<0b00, "c.subw", GPRC, 1>;
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def C_ADDW : CS_ALU<0b01, "c.addw", GPRC, 1>;
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}
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let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
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def C_J : RVInst16CJ<0b101, 0b01, (outs), (ins simm12_lsb0:$offset),
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@ -339,8 +341,8 @@ def C_SLLI : RVInst16CI<0b000, 0b10, (outs GPRNoX0:$rd_wb),
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let Inst{6-2} = imm{4-0};
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}
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def C_FLDSP : CStackLoad<0b001, "c.fldsp", FPR64, uimm9_lsb000>,
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Requires<[HasStdExtD]> {
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let Predicates = [HasStdExtC, HasStdExtD] in
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def C_FLDSP : CStackLoad<0b001, "c.fldsp", FPR64, uimm9_lsb000> {
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let Inst{6-5} = imm{4-3};
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let Inst{4-2} = imm{8-6};
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}
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@ -350,15 +352,15 @@ def C_LWSP : CStackLoad<0b010, "c.lwsp", GPRNoX0, uimm8_lsb00> {
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let Inst{3-2} = imm{7-6};
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}
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let DecoderNamespace = "RISCV32Only_" in
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def C_FLWSP : CStackLoad<0b011, "c.flwsp", FPR32, uimm8_lsb00>,
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Requires<[HasStdExtF, IsRV32]> {
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let DecoderNamespace = "RISCV32Only_",
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Predicates = [HasStdExtC, HasStdExtF, IsRV32] in
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def C_FLWSP : CStackLoad<0b011, "c.flwsp", FPR32, uimm8_lsb00> {
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let Inst{6-4} = imm{4-2};
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let Inst{3-2} = imm{7-6};
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}
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def C_LDSP : CStackLoad<0b011, "c.ldsp", GPRNoX0, uimm9_lsb000>,
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Requires<[IsRV64]> {
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let Predicates = [HasStdExtC, IsRV64] in
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def C_LDSP : CStackLoad<0b011, "c.ldsp", GPRNoX0, uimm9_lsb000> {
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let Inst{6-5} = imm{4-3};
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let Inst{4-2} = imm{8-6};
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}
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@ -392,8 +394,8 @@ def C_ADD : RVInst16CR<0b1001, 0b10, (outs GPRNoX0:$rs1_wb),
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let Constraints = "$rs1 = $rs1_wb";
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}
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def C_FSDSP : CStackStore<0b101, "c.fsdsp", FPR64, uimm9_lsb000>,
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Requires<[HasStdExtD]> {
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let Predicates = [HasStdExtC, HasStdExtD] in
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def C_FSDSP : CStackStore<0b101, "c.fsdsp", FPR64, uimm9_lsb000> {
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let Inst{12-10} = imm{5-3};
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let Inst{9-7} = imm{8-6};
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}
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@ -403,15 +405,15 @@ def C_SWSP : CStackStore<0b110, "c.swsp", GPR, uimm8_lsb00> {
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let Inst{8-7} = imm{7-6};
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}
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let DecoderNamespace = "RISCV32Only_" in
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def C_FSWSP : CStackStore<0b111, "c.fswsp", FPR32, uimm8_lsb00>,
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Requires<[HasStdExtF, IsRV32]> {
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let DecoderNamespace = "RISCV32Only_",
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Predicates = [HasStdExtC, HasStdExtF, IsRV32] in
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def C_FSWSP : CStackStore<0b111, "c.fswsp", FPR32, uimm8_lsb00> {
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let Inst{12-9} = imm{5-2};
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let Inst{8-7} = imm{7-6};
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}
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def C_SDSP : CStackStore<0b111, "c.sdsp", GPR, uimm9_lsb000>,
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Requires<[IsRV64]> {
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let Predicates = [HasStdExtC, IsRV64] in
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def C_SDSP : CStackStore<0b111, "c.sdsp", GPR, uimm9_lsb000> {
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let Inst{12-10} = imm{5-3};
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let Inst{9-7} = imm{8-6};
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}
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@ -2,7 +2,14 @@
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# RUN: | FileCheck -check-prefixes=CHECK,CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c -riscv-no-aliases < %s \
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# RUN: | llvm-objdump -mattr=+c -d - | FileCheck -check-prefix=CHECK-INST %s
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# RUN: not llvm-mc -triple riscv32 \
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# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \
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# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s
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# RUN: not llvm-mc -triple riscv64 -mattr=+c \
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# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \
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# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s
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# CHECK-INST: c.jal 2046
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# CHECK: encoding: [0xfd,0x2f]
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# CHECK-NO-EXT: error: instruction use requires an option to be enabled
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c.jal 2046
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@ -3,17 +3,27 @@
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# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+c,+d < %s \
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# RUN: | llvm-objdump -mattr=+c,+d -riscv-no-aliases -d - \
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# RUN: | FileCheck -check-prefix=CHECK-INST %s
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# RUN: not llvm-mc -triple riscv32 -mattr=+c\
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# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \
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# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s
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# RUN: not llvm-mc -triple riscv32 \
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# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \
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# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s
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# CHECK-INST: c.fldsp fs0, 504(sp)
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# CHECK: encoding: [0x7e,0x34]
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# CHECK-NO-EXT: error: instruction use requires an option to be enabled
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c.fldsp fs0, 504(sp)
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# CHECK-INST: c.fsdsp fa7, 504(sp)
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# CHECK: encoding: [0xc6,0xbf]
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# CHECK-NO-EXT: error: instruction use requires an option to be enabled
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c.fsdsp fa7, 504(sp)
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# CHECK-INST: c.fld fa3, 248(a5)
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# CHECK: encoding: [0xf4,0x3f]
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# CHECK-NO-EXT: error: instruction use requires an option to be enabled
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c.fld fa3, 248(a5)
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# CHECK-INST: c.fsd fa2, 248(a1)
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# CHECK: encoding: [0xf0,0xbd]
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# CHECK-NO-EXT: error: instruction use requires an option to be enabled
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c.fsd fa2, 248(a1)
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@ -3,17 +3,31 @@
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# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+c,+f < %s \
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# RUN: | llvm-objdump -mattr=+c,+f -riscv-no-aliases -d - \
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# RUN: | FileCheck -check-prefix=CHECK-INST %s
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# RUN: not llvm-mc -triple riscv32 -mattr=+c \
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# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \
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# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s
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# RUN: not llvm-mc -triple riscv32 \
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# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \
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# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s
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# RUN: not llvm-mc -triple riscv64 -mattr=+c,+f \
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# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \
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# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s
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# CHECK-INST: c.flwsp fs0, 252(sp)
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# CHECK: encoding: [0x7e,0x74]
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# CHECK-NO-EXT: error: instruction use requires an option to be enabled
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c.flwsp fs0, 252(sp)
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# CHECK-INST: c.fswsp fa7, 252(sp)
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# CHECK: encoding: [0xc6,0xff]
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# CHECK-NO-EXT: error: instruction use requires an option to be enabled
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c.fswsp fa7, 252(sp)
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# CHECK-INST: c.flw fa3, 124(a5)
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# CHECK: encoding: [0xf4,0x7f]
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# CHECK-NO-EXT: error: instruction use requires an option to be enabled
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c.flw fa3, 124(a5)
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# CHECK-INST: c.fsw fa2, 124(a1)
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# CHECK: encoding: [0xf0,0xfd]
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# CHECK-NO-EXT: error: instruction use requires an option to be enabled
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c.fsw fa2, 124(a1)
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@ -3,20 +3,30 @@
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# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+c < %s \
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# RUN: | llvm-objdump -mattr=+c -riscv-no-aliases -d - \
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# RUN: | FileCheck -check-prefix=CHECK-INST %s
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# RUN: not llvm-mc -triple riscv64 \
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# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \
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# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s
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# RUN: not llvm-mc -triple riscv32 -mattr=+c\
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# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \
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# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s
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# TODO: more exhaustive testing of immediate encoding.
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# CHECK-INST: c.ldsp ra, 0(sp)
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# CHECK: encoding: [0x82,0x60]
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# CHECK-NO-EXT: error: instruction use requires an option to be enabled
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c.ldsp ra, 0(sp)
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# CHECK-INST: c.sdsp ra, 504(sp)
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# CHECK: encoding: [0x86,0xff]
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# CHECK-NO-EXT: error: instruction use requires an option to be enabled
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c.sdsp ra, 504(sp)
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# CHECK-INST: c.ld a4, 0(a3)
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# CHECK: encoding: [0x98,0x62]
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# CHECK-NO-EXT: error: instruction use requires an option to be enabled
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c.ld a4, 0(a3)
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# CHECK-INST: c.sd a5, 248(a3)
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# CHECK: encoding: [0xfc,0xfe]
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# CHECK-NO-EXT: error: instruction use requires an option to be enabled
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c.sd a5, 248(a3)
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# CHECK-INST: c.subw a3, a4
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@ -24,17 +34,21 @@ c.sd a5, 248(a3)
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c.subw a3, a4
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# CHECK-INST: c.addw a0, a2
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# CHECK: encoding: [0x31,0x9d]
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# CHECK-NO-EXT: error: instruction use requires an option to be enabled
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c.addw a0, a2
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# CHECK-INST: c.addiw a3, -32
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# CHECK: encoding: [0x81,0x36]
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# CHECK-NO-EXT: error: instruction use requires an option to be enabled
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c.addiw a3, -32
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# CHECK-INST: c.addiw a3, 31
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# CHECK: encoding: [0xfd,0x26]
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# CHECK-NO-EXT: error: instruction use requires an option to be enabled
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c.addiw a3, 31
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# CHECK-INST: c.slli s0, 1
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# CHECK: encoding: [0x06,0x04]
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# CHECK-NO-EXT: error: instruction use requires an option to be enabled
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c.slli s0, 1
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# CHECK-INST: c.srli a3, 63
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# CHECK: encoding: [0xfd,0x92]
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29
test/MC/RISCV/rv64dc-valid.s
Normal file
29
test/MC/RISCV/rv64dc-valid.s
Normal file
@ -0,0 +1,29 @@
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# RUN: llvm-mc %s -triple=riscv64 -mattr=+c,+d -riscv-no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK,CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+c,+d < %s \
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# RUN: | llvm-objdump -mattr=+c,+d -riscv-no-aliases -d - \
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# RUN: | FileCheck -check-prefix=CHECK-INST %s
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# RUN: not llvm-mc -triple riscv64 -mattr=+c\
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# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \
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# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s
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# RUN: not llvm-mc -triple riscv64 \
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# RUN: -riscv-no-aliases -show-encoding < %s 2>&1 \
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# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s
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# CHECK-INST: c.fldsp fs0, 504(sp)
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# CHECK: encoding: [0x7e,0x34]
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# CHECK-NO-EXT: error: instruction use requires an option to be enabled
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c.fldsp fs0, 504(sp)
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# CHECK-INST: c.fsdsp fa7, 504(sp)
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# CHECK: encoding: [0xc6,0xbf]
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# CHECK-NO-EXT: error: instruction use requires an option to be enabled
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c.fsdsp fa7, 504(sp)
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|
||||
# CHECK-INST: c.fld fa3, 248(a5)
|
||||
# CHECK: encoding: [0xf4,0x3f]
|
||||
# CHECK-NO-EXT: error: instruction use requires an option to be enabled
|
||||
c.fld fa3, 248(a5)
|
||||
# CHECK-INST: c.fsd fa2, 248(a1)
|
||||
# CHECK: encoding: [0xf0,0xbd]
|
||||
# CHECK-NO-EXT: error: instruction use requires an option to be enabled
|
||||
c.fsd fa2, 248(a1)
|
||||
Loading…
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Reference in New Issue
Block a user