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remove some target-indep and implemented notes

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llvm-svn: 25930
This commit is contained in:
Chris Lattner 2006-02-03 06:22:11 +00:00
parent 9f8d39543f
commit 172cf85d48
2 changed files with 11 additions and 57 deletions
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24
lib/Target/PowerPC/README.txt
View File

@ -92,6 +92,17 @@ http://gcc.gnu.org/ml/gcc-patches/2006-02/msg00133.html
===-------------------------------------------------------------------------===
PIC Code Gen IPO optimization:
Squish small scalar globals together into a single global struct, allowing the
address of the struct to be CSE'd, avoiding PIC accesses (also reduces the size
of the GOT on targets with one).
Note that this is discussed here for GCC:
http://gcc.gnu.org/ml/gcc-patches/2006-02/msg00133.html
===-------------------------------------------------------------------------===
Implement Newton-Rhapson method for improving estimate instructions to the
correct accuracy, and implementing divide as multiply by reciprocal when it has
more than one use. Itanium will want this too.
@ -351,14 +362,6 @@ just fastcc.
===-------------------------------------------------------------------------===
Code Gen IPO optimization:
Squish small scalar globals together into a single global struct, allowing the
address of the struct to be CSE'd, avoiding PIC accesses (also reduces the size
of the GOT on targets with one).
===-------------------------------------------------------------------------===
Generate lwbrx and other byteswapping load/store instructions when reasonable.
===-------------------------------------------------------------------------===
@ -473,11 +476,6 @@ _foo:
===-------------------------------------------------------------------------===
Get the C front-end to expand hypot(x,y) -> llvm.sqrt(x*x+y*y) when errno and
precision don't matter (ffastmath). Misc/mandel will like this. :)
===-------------------------------------------------------------------------===
Fold add and sub with constant into non-extern, non-weak addresses so this:
static int a;

44
lib/Target/X86/README.txt
View File

@ -76,11 +76,6 @@ Another useful one would be ~0ULL >> X and ~0ULL << X.
//===---------------------------------------------------------------------===//
Should support emission of the bswap instruction, probably by adding a new
DAG node for byte swapping. Also useful on PPC which has byte-swapping loads.
//===---------------------------------------------------------------------===//
Compile this:
_Bool f(_Bool a) { return a!=1; }
@ -168,45 +163,6 @@ Combine: a = sin(x), b = cos(x) into a,b = sincos(x).
//===---------------------------------------------------------------------===//
For all targets, not just X86:
When llvm.memcpy, llvm.memset, or llvm.memmove are lowered, they should be
optimized to a few store instructions if the source is constant and the length
is smallish (< 8). This will greatly help some tests like Shootout/strcat.c
//===---------------------------------------------------------------------===//
Solve this DAG isel folding deficiency:
int X, Y;
void fn1(void)
{
X = X | (Y << 3);
}
compiles to
fn1:
movl Y, %eax
shll $3, %eax
orl X, %eax
movl %eax, X
ret
The problem is the store's chain operand is not the load X but rather
a TokenFactor of the load X and load Y, which prevents the folding.
There are two ways to fix this:
1. The dag combiner can start using alias analysis to realize that y/x
don't alias, making the store to X not dependent on the load from Y.
2. The generated isel could be made smarter in the case it can't
disambiguate the pointers.
Number 1 is the preferred solution.
//===---------------------------------------------------------------------===//
The instruction selector sometimes misses folding a load into a compare. The
pattern is written as (cmp reg, (load p)). Because the compare isn't
commutative, it is not matched with the load on both sides. The dag combiner