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implement support for the intrinsic lowering functionality
llvm-svn: 10629
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58cbeaed27
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1791047661
@ -27,8 +27,7 @@
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// Include the generated instruction selector...
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#include "X86GenInstrSelector.inc"
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namespace llvm {
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using namespace llvm;
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namespace {
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struct ISel : public FunctionPass, SelectionDAGTargetBuilder {
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@ -120,8 +119,7 @@ void ISel::expandCall(SelectionDAG &SD, CallInst &CI) {
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/// into a machine code representation using pattern matching and a machine
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/// description file.
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///
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FunctionPass *createX86PatternInstructionSelector(TargetMachine &TM) {
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FunctionPass *llvm::createX86PatternInstructionSelector(TargetMachine &TM,
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IntrinsicLowering &IL) {
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return new ISel(TM);
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}
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} // End llvm namespace
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@ -19,6 +19,7 @@
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#include "llvm/Function.h"
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#include "llvm/Instructions.h"
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#include "llvm/Intrinsics.h"
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#include "llvm/IntrinsicLowering.h"
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#include "llvm/Pass.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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@ -28,8 +29,7 @@
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#include "llvm/Target/MRegisterInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/InstVisitor.h"
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namespace llvm {
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using namespace llvm;
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/// BMI - A special BuildMI variant that takes an iterator to insert the
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/// instruction at as well as a basic block. This is the version for when you
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@ -59,6 +59,7 @@ inline static MachineInstrBuilder BMI(MachineBasicBlock *MBB,
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namespace {
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struct ISel : public FunctionPass, InstVisitor<ISel> {
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TargetMachine &TM;
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IntrinsicLowering &IL;
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MachineFunction *F; // The function we are compiling into
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MachineBasicBlock *BB; // The current MBB we are compiling
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int VarArgsFrameIndex; // FrameIndex for start of varargs area
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@ -68,12 +69,17 @@ namespace {
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// MBBMap - Mapping between LLVM BB -> Machine BB
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std::map<const BasicBlock*, MachineBasicBlock*> MBBMap;
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ISel(TargetMachine &tm) : TM(tm), F(0), BB(0) {}
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ISel(TargetMachine &tm, IntrinsicLowering &il)
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: TM(tm), IL(il), F(0), BB(0) {}
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/// runOnFunction - Top level implementation of instruction selection for
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/// the entire function.
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///
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bool runOnFunction(Function &Fn) {
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// First pass over the function, lower any unknown intrinsic functions
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// with the IntrinsicLowering class.
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LowerUnknownIntrinsicFunctionCalls(Fn);
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F = &MachineFunction::construct(&Fn, TM);
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// Create all of the machine basic blocks for the function...
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@ -111,6 +117,11 @@ namespace {
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BB = MBBMap[&LLVM_BB];
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}
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/// LowerUnknownIntrinsicFunctionCalls - This performs a prepass over the
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/// function, lowering any calls to unknown intrinsic functions into the
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/// equivalent LLVM code.
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void LowerUnknownIntrinsicFunctionCalls(Function &F);
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/// LoadArgumentsToVirtualRegs - Load all of the arguments to this function
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/// from the stack into virtual registers.
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///
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@ -1087,6 +1098,33 @@ void ISel::visitCallInst(CallInst &CI) {
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}
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/// LowerUnknownIntrinsicFunctionCalls - This performs a prepass over the
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/// function, lowering any calls to unknown intrinsic functions into the
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/// equivalent LLVM code.
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void ISel::LowerUnknownIntrinsicFunctionCalls(Function &F) {
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for (Function::iterator BB = F.begin(), E = F.end(); BB != E; ++BB)
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for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; )
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if (CallInst *CI = dyn_cast<CallInst>(I++))
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if (Function *F = CI->getCalledFunction())
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switch (F->getIntrinsicID()) {
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case Intrinsic::va_start:
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case Intrinsic::va_copy:
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case Intrinsic::va_end:
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// We directly implement these intrinsics
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break;
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default:
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// All other intrinsic calls we must lower.
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Instruction *Before = CI->getPrev();
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IL.LowerIntrinsicCall(CI);
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if (Before) { // Move iterator to instruction after call
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I = Before; ++I;
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} else {
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I = BB->begin();
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}
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}
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}
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void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
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unsigned TmpReg1, TmpReg2;
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switch (ID) {
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@ -1103,17 +1141,7 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
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return;
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case Intrinsic::va_end: return; // Noop on X86
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case Intrinsic::longjmp:
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case Intrinsic::siglongjmp:
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BuildMI(BB, X86::CALLpcrel32, 1).addExternalSymbol("abort", true);
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return;
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case Intrinsic::setjmp:
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case Intrinsic::sigsetjmp:
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// Setjmp always returns zero...
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BuildMI(BB, X86::MOVir32, 1, getReg(CI)).addZImm(0);
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return;
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default: assert(0 && "Unknown intrinsic for X86!");
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default: assert(0 && "Error: unknown intrinsics should have been lowered!");
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}
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}
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@ -2167,8 +2195,7 @@ void ISel::visitFreeInst(FreeInst &I) {
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/// into a machine code representation is a very simple peep-hole fashion. The
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/// generated code sucks but the implementation is nice and simple.
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///
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FunctionPass *createX86SimpleInstructionSelector(TargetMachine &TM) {
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return new ISel(TM);
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FunctionPass *llvm::createX86SimpleInstructionSelector(TargetMachine &TM,
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IntrinsicLowering &IL) {
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return new ISel(TM, IL);
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}
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} // End llvm namespace
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@ -21,18 +21,21 @@ namespace llvm {
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class TargetMachine;
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class FunctionPass;
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class IntrinsicLowering;
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/// createX86SimpleInstructionSelector - This pass converts an LLVM function
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/// into a machine code representation in a very simple peep-hole fashion. The
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/// generated code sucks but the implementation is nice and simple.
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///
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FunctionPass *createX86SimpleInstructionSelector(TargetMachine &TM);
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FunctionPass *createX86SimpleInstructionSelector(TargetMachine &TM,
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IntrinsicLowering &IL);
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/// createX86PatternInstructionSelector - This pass converts an LLVM function
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/// into a machine code representation using pattern matching and a machine
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/// description file.
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///
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FunctionPass *createX86PatternInstructionSelector(TargetMachine &TM);
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FunctionPass *createX86PatternInstructionSelector(TargetMachine &TM,
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IntrinsicLowering &IL);
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/// createX86SSAPeepholeOptimizerPass - Create a pass to perform SSA-based X86
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/// specific peephole optimizations.
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@ -18,10 +18,13 @@
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namespace llvm {
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class TargetMachine;
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class IntrinsicLowering;
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class X86JITInfo : public TargetJITInfo {
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TargetMachine &TM;
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IntrinsicLowering &IL;
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public:
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X86JITInfo(TargetMachine &tm) : TM(tm) {}
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X86JITInfo(TargetMachine &tm, IntrinsicLowering &il) : TM(tm), IL(il) {}
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/// addPassesToJITCompile - Add passes to the specified pass manager to
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/// implement a fast dynamic compiler for this target. Return true if this
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@ -13,6 +13,7 @@
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#include "X86TargetMachine.h"
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#include "X86.h"
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#include "llvm/IntrinsicLowering.h"
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#include "llvm/Module.h"
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#include "llvm/PassManager.h"
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#include "llvm/Target/TargetMachineImpls.h"
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@ -29,23 +30,30 @@ namespace {
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cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true),
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cl::desc("Use the 'simple' X86 instruction selector"));
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cl::opt<bool> NoSSAPeephole("disable-ssa-peephole", cl::init(true),
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cl::desc("Disable the ssa-based peephole optimizer (defaults to disabled)"));
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cl::desc("Disable the ssa-based peephole optimizer "
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"(defaults to disabled)"));
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}
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// allocateX86TargetMachine - Allocate and return a subclass of TargetMachine
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// that implements the X86 backend.
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//
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TargetMachine *llvm::allocateX86TargetMachine(const Module &M) {
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return new X86TargetMachine(M);
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TargetMachine *llvm::allocateX86TargetMachine(const Module &M,
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IntrinsicLowering *IL) {
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return new X86TargetMachine(M, IL);
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}
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/// X86TargetMachine ctor - Create an ILP32 architecture model
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///
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X86TargetMachine::X86TargetMachine(const Module &M)
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X86TargetMachine::X86TargetMachine(const Module &M, IntrinsicLowering *il)
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: TargetMachine("X86", true, 4, 4, 4, 4, 4),
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IL(il ? il : new DefaultIntrinsicLowering()),
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FrameInfo(TargetFrameInfo::StackGrowsDown, 8/*16 for SSE*/, 4),
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JITInfo(*this) {
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JITInfo(*this, *IL) {
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}
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X86TargetMachine::~X86TargetMachine() {
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delete IL;
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}
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@ -64,9 +72,9 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
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PM.add(createCFGSimplificationPass());
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if (NoPatternISel)
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PM.add(createX86SimpleInstructionSelector(*this));
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PM.add(createX86SimpleInstructionSelector(*this, *IL));
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else
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PM.add(createX86PatternInstructionSelector(*this));
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PM.add(createX86PatternInstructionSelector(*this, *IL));
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// Run optional SSA-based machine code optimizations next...
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if (!NoSSAPeephole)
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@ -119,9 +127,9 @@ void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
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PM.add(createCFGSimplificationPass());
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if (NoPatternISel)
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PM.add(createX86SimpleInstructionSelector(TM));
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PM.add(createX86SimpleInstructionSelector(TM, IL));
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else
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PM.add(createX86PatternInstructionSelector(TM));
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PM.add(createX86PatternInstructionSelector(TM, IL));
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// Run optional SSA-based machine code optimizations next...
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if (!NoSSAPeephole)
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#include "X86JITInfo.h"
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namespace llvm {
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class IntrinsicLowering;
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class X86TargetMachine : public TargetMachine {
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IntrinsicLowering *IL;
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X86InstrInfo InstrInfo;
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TargetFrameInfo FrameInfo;
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X86JITInfo JITInfo;
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public:
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X86TargetMachine(const Module &M);
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X86TargetMachine(const Module &M, IntrinsicLowering *IL);
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~X86TargetMachine();
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virtual const X86InstrInfo &getInstrInfo() const { return InstrInfo; }
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virtual const TargetFrameInfo &getFrameInfo() const { return FrameInfo; }
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