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AArch64: avoid splitting vector truncating stores.
We have code to split vector splats (of zero and non-zero) for performance reasons, but it ignores the fact that a store might be truncating. Actually, truncating stores are formed for vNi8 and vNi16 types. Since the truncation is from a legal type, the size of the store is always <= 64-bits and so they don't actually benefit from being split up anyway, so this patch just disables that transformation. llvm-svn: 350620
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@ -10053,6 +10053,7 @@ static SDValue performExtendCombine(SDNode *N,
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static SDValue splitStoreSplat(SelectionDAG &DAG, StoreSDNode &St,
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SDValue SplatVal, unsigned NumVecElts) {
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assert(!St.isTruncatingStore() && "cannot split truncating vector store");
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unsigned OrigAlignment = St.getAlignment();
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unsigned EltOffset = SplatVal.getValueType().getSizeInBits() / 8;
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@ -10127,6 +10128,11 @@ static SDValue replaceZeroVectorStore(SelectionDAG &DAG, StoreSDNode &St) {
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if (!StVal.hasOneUse())
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return SDValue();
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// If the store is truncating then it's going down to i16 or smaller, which
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// means it can be implemented in a single store anyway.
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if (St.isTruncatingStore())
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return SDValue();
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// If the immediate offset of the address operand is too large for the stp
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// instruction, then bail out.
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if (DAG.isBaseWithConstantOffset(St.getBasePtr())) {
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@ -10177,6 +10183,11 @@ static SDValue replaceSplatVectorStore(SelectionDAG &DAG, StoreSDNode &St) {
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if (NumVecElts != 4 && NumVecElts != 2)
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return SDValue();
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// If the store is truncating then it's going down to i16 or smaller, which
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// means it can be implemented in a single store anyway.
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if (St.isTruncatingStore())
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return SDValue();
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// Check that this is a splat.
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// Make sure that each of the relevant vector element locations are inserted
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// to, i.e. 0 and 1 for v2i64 and 0, 1, 2, 3 for v4i32.
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@ -1681,3 +1681,19 @@ entry:
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%add = add i64 %ld, 1
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ret i64 %add
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}
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; CHECK-LABEL: trunc_splat_zero:
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; CHECK-DAG: strh wzr, [x0]
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define void @trunc_splat_zero(<2 x i8>* %ptr) {
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store <2 x i8> zeroinitializer, <2 x i8>* %ptr, align 2
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ret void
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}
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; CHECK-LABEL: trunc_splat:
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; CHECK: mov [[VAL:w[0-9]+]], #42
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; CHECK: movk [[VAL]], #42, lsl #16
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; CHECK: str [[VAL]], [x0]
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define void @trunc_splat(<2 x i16>* %ptr) {
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store <2 x i16> <i16 42, i16 42>, <2 x i16>* %ptr, align 4
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ret void
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}
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