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For mips64 switch statements in subroutines could generate

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within the codegen EK_GPRel64BlockAddress. This was not 
supported for direct object output and resulted in an assertion.

This change adds support for EK_GPRel64BlockAddress for 
direct object.

One fallout from this is to turn on rela relocations 
for mips64 to match gas.

llvm-svn: 162334
This commit is contained in:
Jack Carter 2012-08-22 00:49:30 +00:00
parent 97aac5041b
commit 1b099ac7c7
4 changed files with 50 additions and 4 deletions
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1
include/llvm/MC/MCObjectStreamer.h
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@ -80,6 +80,7 @@ public:
virtual void EmitDwarfAdvanceFrameAddr(const MCSymbol *LastLabel,
const MCSymbol *Label);
virtual void EmitGPRel32Value(const MCExpr *Value);
virtual void EmitGPRel64Value(const MCExpr *Value);
virtual void FinishImpl();
/// @}

12
lib/MC/MCObjectStreamer.cpp
View File

@ -258,12 +258,18 @@ bool MCObjectStreamer::EmitValueToOffset(const MCExpr *Offset,
void MCObjectStreamer::EmitGPRel32Value(const MCExpr *Value) {
MCDataFragment *DF = getOrCreateDataFragment();
DF->addFixup(MCFixup::Create(DF->getContents().size(),
Value,
FK_GPRel_4));
DF->addFixup(MCFixup::Create(DF->getContents().size(), Value, FK_GPRel_4));
DF->getContents().resize(DF->getContents().size() + 4, 0);
}
// Associate GPRel32 fixup with data and resize data area
void MCObjectStreamer::EmitGPRel64Value(const MCExpr *Value) {
MCDataFragment *DF = getOrCreateDataFragment();
DF->addFixup(MCFixup::Create(DF->getContents().size(), Value, FK_GPRel_4));
DF->getContents().resize(DF->getContents().size() + 8, 0);
}
void MCObjectStreamer::FinishImpl() {
// Dump out the dwarf file & directory tables and line tables.
const MCSymbol *LineSectionSymbol = NULL;

2
lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
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@ -56,7 +56,7 @@ namespace {
MipsELFObjectWriter::MipsELFObjectWriter(bool _is64Bit, uint8_t OSABI,
bool _isN64, bool IsLittleEndian)
: MCELFObjectTargetWriter(_is64Bit, OSABI, ELF::EM_MIPS,
/*HasRelocationAddend*/ false,
/*HasRelocationAddend*/ (_isN64) ? true : false,
/*IsN64*/ _isN64) {}
MipsELFObjectWriter::~MipsELFObjectWriter() {}

39
test/MC/Mips/do_switch.ll Normal file
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@ -0,0 +1,39 @@
; This test case will cause an internal EK_GPRel64BlockAddress to be
; produced. This was not handled for direct object and an assertion
; to occur. This is a variation on test case test/CodeGen/Mips/do_switch.ll
; RUN: llc < %s -filetype=obj -march=mips -relocation-model=static
; RUN: llc < %s -filetype=obj -march=mips -relocation-model=pic
; RUN: llc < %s -filetype=obj -march=mips64 -relocation-model=pic -mcpu=mips64 -mattr=n64
define i32 @main() nounwind readnone {
entry:
%x = alloca i32, align 4 ; <i32*> [#uses=2]
store volatile i32 2, i32* %x, align 4
%0 = load volatile i32* %x, align 4 ; <i32> [#uses=1]
switch i32 %0, label %bb4 [
i32 0, label %bb5
i32 1, label %bb1
i32 2, label %bb2
i32 3, label %bb3
]
bb1: ; preds = %entry
ret i32 2
bb2: ; preds = %entry
ret i32 0
bb3: ; preds = %entry
ret i32 3
bb4: ; preds = %entry
ret i32 4
bb5: ; preds = %entry
ret i32 1
}