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Filter out patterns that have PredicateOperands.
llvm-svn: 109572
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parent
2bea1e1572
commit
1b1705cfa9
@ -54,6 +54,7 @@ struct OperandsSignature {
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bool initialize(TreePatternNode *InstPatNode,
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const CodeGenTarget &Target,
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MVT::SimpleValueType VT) {
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if (!InstPatNode->isLeaf()) {
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if (InstPatNode->getOperator()->getName() == "imm") {
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Operands.push_back("i");
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@ -69,6 +70,7 @@ struct OperandsSignature {
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for (unsigned i = 0, e = InstPatNode->getNumChildren(); i != e; ++i) {
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TreePatternNode *Op = InstPatNode->getChild(i);
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// For now, filter out any operand with a predicate.
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// For now, filter out any operand with multiple values.
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if (!Op->getPredicateFns().empty() ||
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@ -105,6 +107,7 @@ struct OperandsSignature {
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RC = Target.getRegisterClassForRegister(OpLeafRec);
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else
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return false;
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// For now, require the register operands' register classes to all
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// be the same.
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if (!RC)
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@ -262,6 +265,15 @@ void FastISelMap::CollectPatterns(CodeGenDAGPatterns &CGP) {
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if (II.OperandList.empty())
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continue;
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// For now ignore instructions that have predicate operands.
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bool HasPredicate = false;
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for (unsigned i = 0, e = II.OperandList.size(); i != e; ++i) {
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if(II.OperandList[i].Rec->isSubClassOf("PredicateOperand"))
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HasPredicate = true;
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}
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if (HasPredicate)
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continue;
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// For now, ignore multi-instruction patterns.
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bool MultiInsts = false;
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for (unsigned i = 0, e = Dst->getNumChildren(); i != e; ++i) {
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