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Revert "AMDGPU/SI: Add amdgpu_kernel calling convention. Part 2."

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This reverts commit 47486d52454d60cdf6becc0b2efe533c73794380.

It broke calling OpenCL kernel from another kernel.

llvm-svn: 268739
This commit is contained in:
Nikolay Haustov 2016-05-06 14:59:04 +00:00
parent 55d3667833
commit 1bdab4f693
3 changed files with 5 additions and 70 deletions
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9
lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
View File

@ -13,12 +13,5 @@ AMDGPUMachineFunction::AMDGPUMachineFunction(const MachineFunction &MF) :
LDSSize(0),
ABIArgOffset(0),
ScratchSize(0),
IsKernel(MF.getFunction()->getCallingConv() == llvm::CallingConv::AMDGPU_KERNEL ||
MF.getFunction()->getCallingConv() == llvm::CallingConv::SPIR_KERNEL)
{
}
bool AMDGPUMachineFunction::isKernel() const
{
return IsKernel;
IsKernel(true) {
}

5
lib/Target/AMDGPU/AMDGPUMachineFunction.h
View File

@ -29,7 +29,10 @@ public:
/// Start of implicit kernel args
unsigned ABIArgOffset;
bool isKernel() const;
bool isKernel() const {
// FIXME: Assume everything is a kernel until function calls are supported.
return true;
}
unsigned ScratchSize;
bool IsKernel;

61
test/CodeGen/AMDGPU/hsa-func.ll
View File

@ -1,61 +0,0 @@
; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | FileCheck --check-prefix=HSA %s
; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri -mattr=-flat-for-global | FileCheck --check-prefix=HSA-CI %s
; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=carrizo | FileCheck --check-prefix=HSA %s
; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=carrizo -mattr=-flat-for-global | FileCheck --check-prefix=HSA-VI %s
; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri -filetype=obj | llvm-readobj -symbols -s -sd | FileCheck --check-prefix=ELF %s
; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | llvm-mc -filetype=obj -triple amdgcn--amdhsa -mcpu=kaveri | llvm-readobj -symbols -s -sd | FileCheck %s --check-prefix=ELF
; The SHT_NOTE section contains the output from the .hsa_code_object_*
; directives.
; ELF: Section {
; ELF: Name: .text
; ELF: Type: SHT_PROGBITS (0x1)
; ELF: Flags [ (0x6)
; ELF: SHF_ALLOC (0x2)
; ELF: SHF_EXECINSTR (0x4)
; ELF: }
; ELF: SHT_NOTE
; ELF: 0000: 04000000 08000000 01000000 414D4400
; ELF: 0010: 02000000 00000000 04000000 1B000000
; ELF: 0020: 03000000 414D4400 04000700 07000000
; ELF: 0030: 00000000 00000000 414D4400 414D4447
; ELF: 0040: 50550000
; ELF: Symbol {
; ELF: Name: simple
; ELF: Size: 288
; ELF: Type: Function (0x2)
; ELF: }
; HSA: .hsa_code_object_version 2,0
; HSA-CI: .hsa_code_object_isa 7,0,0,"AMD","AMDGPU"
; HSA-VI: .hsa_code_object_isa 8,0,1,"AMD","AMDGPU"
; HSA: .text
; HSA-NOT: .amdgpu_hsa_kernel simple
; HSA: {{^}}simple:
; HSA: .amd_kernel_code_t
; HSA: enable_sgpr_private_segment_buffer = 1
; HSA: enable_sgpr_kernarg_segment_ptr = 1
; HSA: .end_amd_kernel_code_t
; HSA: s_load_dwordx2 s[{{[0-9]+:[0-9]+}}], s[4:5], 0x0
; Make sure we are setting the ATC bit:
; HSA-CI: s_mov_b32 s[[HI:[0-9]]], 0x100f000
; On VI+ we also need to set MTYPE = 2
; HSA-VI: s_mov_b32 s[[HI:[0-9]]], 0x1100f000
; Make sure we generate flat store for HSA
; HSA: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}
; HSA: .Lfunc_end0:
; HSA: .size simple, .Lfunc_end0-simple
define void @simple(i32 addrspace(1)* %out) {
entry:
store i32 0, i32 addrspace(1)* %out
ret void
}