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Avoid generating ISD::SELECT for vector operands to SIGN_EXTEND
llvm-svn: 176881
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@ -4496,8 +4496,8 @@ SDValue DAGCombiner::visitSIGN_EXTEND(SDNode *N) {
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NegOne, DAG.getConstant(0, VT),
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cast<CondCodeSDNode>(N0.getOperand(2))->get(), true);
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if (SCC.getNode()) return SCC;
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if (!LegalOperations ||
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TLI.isOperationLegal(ISD::SETCC, TLI.getSetCCResultType(VT)))
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if (!VT.isVector() && (!LegalOperations ||
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TLI.isOperationLegal(ISD::SETCC, TLI.getSetCCResultType(VT))))
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return DAG.getNode(ISD::SELECT, N->getDebugLoc(), VT,
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DAG.getSetCC(N->getDebugLoc(),
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TLI.getSetCCResultType(VT),
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