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Whoops, got my cases swapped.

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llvm-svn: 11526
This commit is contained in:
Chris Lattner 2004-02-17 06:02:15 +00:00
parent e227ae6b88
commit 1db99b1949
1 changed files with 6 additions and 6 deletions
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12
lib/Target/X86/PeepholeOptimizer.cpp
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@ -146,12 +146,8 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
case X86::XORri32: Opcode = X86::XORri32b; break;
}
unsigned R0 = MI->getOperand(0).getReg();
unsigned Scale = MI->getOperand(1).getImmedValue();
unsigned R1 = MI->getOperand(2).getReg();
unsigned Offset = MI->getOperand(3).getImmedValue();
I = MBB.insert(MBB.erase(I),
BuildMI(Opcode, 5).addReg(R0).addZImm(Scale).
addReg(R1).addSImm(Offset).addZImm((char)Val));
BuildMI(Opcode, 1, R0, MOTy::UseAndDef).addZImm((char)Val));
return true;
}
}
@ -171,8 +167,12 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
case X86::ANDmi32: Opcode = X86::ANDmi32b; break;
}
unsigned R0 = MI->getOperand(0).getReg();
unsigned Scale = MI->getOperand(1).getImmedValue();
unsigned R1 = MI->getOperand(2).getReg();
unsigned Offset = MI->getOperand(3).getImmedValue();
I = MBB.insert(MBB.erase(I),
BuildMI(Opcode, 1, R0, MOTy::UseAndDef).addZImm((char)Val));
BuildMI(Opcode, 5).addReg(R0).addZImm(Scale).
addReg(R1).addSImm(Offset).addZImm((char)Val));
return true;
}
}