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[X86] AVX512 fallback for floating-point scalar selects

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Summary:
In the case where of 'select i1 , f32, f32' or select i1, f64, f64 prefer lowering to masked-moves over branches.

Fixes pr30561

Reviewers: igorb, aymanmus, delena

Differential Revision: https://reviews.llvm.org/D25310

llvm-svn: 285196
This commit is contained in:
Zvi Rackover 2016-10-26 14:12:46 +00:00
parent 8a25f27095
commit 1f202ea0e7
2 changed files with 13 additions and 12 deletions
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5
lib/Target/X86/X86ISelLowering.cpp
View File

@ -16149,6 +16149,11 @@ SDValue X86TargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const {
}
}
// AVX512 fallback is to lower selects of scalar floats to masked moves.
if (Cond.getValueType() == MVT::i1 && (VT == MVT::f64 || VT == MVT::f32) &&
Subtarget.hasAVX512())
return DAG.getNode(X86ISD::SELECTS, DL, VT, Cond, Op1, Op2);
if (VT.isVector() && VT.getVectorElementType() == MVT::i1) {
SDValue Op1Scalar;
if (ISD::isBuildVectorOfConstantSDNodes(Op1.getNode()))

20
test/CodeGen/X86/avx512-select.ll
View File

@ -159,27 +159,23 @@ define i64 @pr30249() {
ret i64 %v
}
define double @pr30561_f64(double %a, double %b, i1 %c) {
define double @pr30561_f64(double %b, double %a, i1 %c) {
; CHECK-LABEL: pr30561_f64:
; CHECK: ## BB#0:
; CHECK-NEXT: testb $1, %dil
; CHECK-NEXT: jne LBB11_2
; CHECK-NEXT: ## BB#1:
; CHECK-NEXT: vmovaps %xmm1, %xmm0
; CHECK-NEXT: LBB11_2:
; CHECK-NEXT: andl $1, %edi
; CHECK-NEXT: kmovw %edi, %k1
; CHECK-NEXT: vmovsd %xmm1, %xmm0, %xmm0 {%k1}
; CHECK-NEXT: retq
%cond = select i1 %c, double %a, double %b
ret double %cond
}
define float @pr30561_f32(float %a, float %b, i1 %c) {
define float @pr30561_f32(float %b, float %a, i1 %c) {
; CHECK-LABEL: pr30561_f32:
; CHECK: ## BB#0:
; CHECK-NEXT: testb $1, %dil
; CHECK-NEXT: jne LBB12_2
; CHECK-NEXT: ## BB#1:
; CHECK-NEXT: vmovaps %xmm1, %xmm0
; CHECK-NEXT: LBB12_2:
; CHECK-NEXT: andl $1, %edi
; CHECK-NEXT: kmovw %edi, %k1
; CHECK-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1}
; CHECK-NEXT: retq
%cond = select i1 %c, float %a, float %b
ret float %cond