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Need to specify SSE4 for machines which don't have SSE4. The code checked for is generated by SSE4. Otherwise, we get something else.
llvm-svn: 115352
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@ -1,9 +1,9 @@
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; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 -mtriple=x86_64-apple-darwin10 | FileCheck %s
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; RUN: llc < %s -march=x86 -mattr=+mmx,+sse42 -mtriple=x86_64-apple-darwin10 | FileCheck %s
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; There are no MMX operations in bork; promoted to XMM.
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define void @bork(<1 x i64>* %x) {
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; CHECK: bork
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; FIXMEHECK: pextrd
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; CHECK: pextrd
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entry:
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%tmp2 = load <1 x i64>* %x ; <<1 x i64>> [#uses=1]
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%tmp6 = bitcast <1 x i64> %tmp2 to <2 x i32> ; <<2 x i32>> [#uses=1]
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@ -18,7 +18,7 @@ entry:
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define void @pork(x86_mmx* %x) {
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; CHECK: pork
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; FIXMEHECK: punpckhdq
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; CHECK: punpckhdq
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entry:
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%tmp2 = load x86_mmx* %x ; <x86_mmx> [#uses=1]
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%tmp9 = tail call x86_mmx @llvm.x86.mmx.punpckhdq (x86_mmx %tmp2, x86_mmx %tmp2)
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@ -1,12 +1,12 @@
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; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 -mtriple=i686-apple-darwin9 | FileCheck %s
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; RUN: llc < %s -march=x86 -mattr=+mmx,+sse42 -mtriple=i686-apple-darwin9 | FileCheck %s
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; MMX insertelement is not available; these are promoted to XMM.
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; (Without SSE they are split to two ints, and the code is much better.)
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define x86_mmx @mmx_movzl(x86_mmx %x) nounwind {
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entry:
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; CHECK: mmx_movzl
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; FIXMEHECK: pinsrd
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; FIXMEHECK: pinsrd
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; CHECK: pinsrd
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; CHECK: pinsrd
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%tmp = bitcast x86_mmx %x to <2 x i32>
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%tmp3 = insertelement <2 x i32> %tmp, i32 32, i32 0 ; <<2 x i32>> [#uses=1]
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%tmp8 = insertelement <2 x i32> %tmp3, i32 0, i32 1 ; <<2 x i32>> [#uses=1]
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