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Add llvm.ceil, llvm.trunc, llvm.rint, llvm.nearbyint intrinsics.

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llvm-svn: 168025
This commit is contained in:
Craig Topper 2012-11-15 06:51:10 +00:00
parent 3fddf95e17
commit 216a5138e7
6 changed files with 178 additions and 1 deletions
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141
docs/LangRef.html
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@ -260,6 +260,10 @@
<li><a href="#int_fma">'<tt>llvm.fma.*</tt>' Intrinsic</a></li>
<li><a href="#int_fabs">'<tt>llvm.fabs.*</tt>' Intrinsic</a></li>
<li><a href="#int_floor">'<tt>llvm.floor.*</tt>' Intrinsic</a></li>
<li><a href="#int_ceil">'<tt>llvm.ceil.*</tt>' Intrinsic</a></li>
<li><a href="#int_trunc">'<tt>llvm.trunc.*</tt>' Intrinsic</a></li>
<li><a href="#int_rint">'<tt>llvm.rint.*</tt>' Intrinsic</a></li>
<li><a href="#int_nearbyint">'<tt>llvm.nearbyint.*</tt>' Intrinsic</a></li>
</ol>
</li>
<li><a href="#int_manip">Bit Manipulation Intrinsics</a>
@ -7634,6 +7638,143 @@ LLVM</a>.</p>
</div>
<!-- _______________________________________________________________________ -->
<h4>
<a name="int_ceil">'<tt>llvm.ceil.*</tt>' Intrinsic</a>
</h4>
<div>
<h5>Syntax:</h5>
<p>This is an overloaded intrinsic. You can use <tt>llvm.ceil</tt> on any
floating point or vector of floating point type. Not all targets support all
types however.</p>
<pre>
declare float @llvm.ceil.f32(float %Val)
declare double @llvm.ceil.f64(double %Val)
declare x86_fp80 @llvm.ceil.f80(x86_fp80 %Val)
declare fp128 @llvm.ceil.f128(fp128 %Val)
declare ppc_fp128 @llvm.ceil.ppcf128(ppc_fp128 %Val)
</pre>
<h5>Overview:</h5>
<p>The '<tt>llvm.ceil.*</tt>' intrinsics return the ceiling of
the operand.</p>
<h5>Arguments:</h5>
<p>The argument and return value are floating point numbers of the same
type.</p>
<h5>Semantics:</h5>
<p>This function returns the same values as the libm <tt>ceil</tt> functions
would, and handles error conditions in the same way.</p>
</div>
<!-- _______________________________________________________________________ -->
<h4>
<a name="int_trunc">'<tt>llvm.trunc.*</tt>' Intrinsic</a>
</h4>
<div>
<h5>Syntax:</h5>
<p>This is an overloaded intrinsic. You can use <tt>llvm.trunc</tt> on any
floating point or vector of floating point type. Not all targets support all
types however.</p>
<pre>
declare float @llvm.trunc.f32(float %Val)
declare double @llvm.trunc.f64(double %Val)
declare x86_fp80 @llvm.trunc.f80(x86_fp80 %Val)
declare fp128 @llvm.trunc.f128(fp128 %Val)
declare ppc_fp128 @llvm.trunc.ppcf128(ppc_fp128 %Val)
</pre>
<h5>Overview:</h5>
<p>The '<tt>llvm.trunc.*</tt>' intrinsics returns the operand rounded to the
nearest integer not larger in magnitude than the operand.</p>
<h5>Arguments:</h5>
<p>The argument and return value are floating point numbers of the same
type.</p>
<h5>Semantics:</h5>
<p>This function returns the same values as the libm <tt>trunc</tt> functions
would, and handles error conditions in the same way.</p>
</div>
<!-- _______________________________________________________________________ -->
<h4>
<a name="int_rint">'<tt>llvm.rint.*</tt>' Intrinsic</a>
</h4>
<div>
<h5>Syntax:</h5>
<p>This is an overloaded intrinsic. You can use <tt>llvm.rint</tt> on any
floating point or vector of floating point type. Not all targets support all
types however.</p>
<pre>
declare float @llvm.rint.f32(float %Val)
declare double @llvm.rint.f64(double %Val)
declare x86_fp80 @llvm.rint.f80(x86_fp80 %Val)
declare fp128 @llvm.rint.f128(fp128 %Val)
declare ppc_fp128 @llvm.rint.ppcf128(ppc_fp128 %Val)
</pre>
<h5>Overview:</h5>
<p>The '<tt>llvm.rint.*</tt>' intrinsics returns the operand rounded to the
nearest integer. It may raise an inexact floating-point exception if the
operand isn't an integer.</p>
<h5>Arguments:</h5>
<p>The argument and return value are floating point numbers of the same
type.</p>
<h5>Semantics:</h5>
<p>This function returns the same values as the libm <tt>rint</tt> functions
would, and handles error conditions in the same way.</p>
</div>
<!-- _______________________________________________________________________ -->
<h4>
<a name="int_nearbyint">'<tt>llvm.nearbyint.*</tt>' Intrinsic</a>
</h4>
<div>
<h5>Syntax:</h5>
<p>This is an overloaded intrinsic. You can use <tt>llvm.nearbyint</tt> on any
floating point or vector of floating point type. Not all targets support all
types however.</p>
<pre>
declare float @llvm.nearbyint.f32(float %Val)
declare double @llvm.nearbyint.f64(double %Val)
declare x86_fp80 @llvm.nearbyint.f80(x86_fp80 %Val)
declare fp128 @llvm.nearbyint.f128(fp128 %Val)
declare ppc_fp128 @llvm.nearbyint.ppcf128(ppc_fp128 %Val)
</pre>
<h5>Overview:</h5>
<p>The '<tt>llvm.nearbyint.*</tt>' intrinsics returns the operand rounded to the
nearest integer.</p>
<h5>Arguments:</h5>
<p>The argument and return value are floating point numbers of the same
type.</p>
<h5>Semantics:</h5>
<p>This function returns the same values as the libm <tt>nearbyint</tt>
functions would, and handles error conditions in the same way.</p>
</div>
</div>
<!-- ======================================================================= -->

4
include/llvm/Intrinsics.td
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@ -271,6 +271,10 @@ let Properties = [IntrReadMem] in {
def int_exp2 : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>;
def int_fabs : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>;
def int_floor : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>;
def int_ceil : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>;
def int_trunc : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>;
def int_rint : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>;
def int_nearbyint : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>;
}
let Properties = [IntrNoMem] in {

20
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
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@ -4996,6 +4996,26 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
getValue(I.getArgOperand(0)).getValueType(),
getValue(I.getArgOperand(0))));
return 0;
case Intrinsic::ceil:
setValue(&I, DAG.getNode(ISD::FCEIL, dl,
getValue(I.getArgOperand(0)).getValueType(),
getValue(I.getArgOperand(0))));
return 0;
case Intrinsic::trunc:
setValue(&I, DAG.getNode(ISD::FTRUNC, dl,
getValue(I.getArgOperand(0)).getValueType(),
getValue(I.getArgOperand(0))));
return 0;
case Intrinsic::rint:
setValue(&I, DAG.getNode(ISD::FRINT, dl,
getValue(I.getArgOperand(0)).getValueType(),
getValue(I.getArgOperand(0))));
return 0;
case Intrinsic::nearbyint:
setValue(&I, DAG.getNode(ISD::FNEARBYINT, dl,
getValue(I.getArgOperand(0)).getValueType(),
getValue(I.getArgOperand(0))));
return 0;
case Intrinsic::fma:
setValue(&I, DAG.getNode(ISD::FMA, dl,
getValue(I.getArgOperand(0)).getValueType(),

4
lib/Target/ARM/ARMISelLowering.cpp
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@ -515,6 +515,10 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
setOperationAction(ISD::FLOG10, MVT::v4f32, Expand);
setOperationAction(ISD::FEXP, MVT::v4f32, Expand);
setOperationAction(ISD::FEXP2, MVT::v4f32, Expand);
setOperationAction(ISD::FCEIL, MVT::v4f32, Expand);
setOperationAction(ISD::FTRUNC, MVT::v4f32, Expand);
setOperationAction(ISD::FRINT, MVT::v4f32, Expand);
setOperationAction(ISD::FNEARBYINT, MVT::v4f32, Expand);
setOperationAction(ISD::FFLOOR, MVT::v4f32, Expand);
// Neon does not support some operations on v1i64 and v2i64 types.

4
lib/Target/PowerPC/PPCISelLowering.cpp
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@ -348,6 +348,10 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
setOperationAction(ISD::FDIV, VT, Expand);
setOperationAction(ISD::FNEG, VT, Expand);
setOperationAction(ISD::FFLOOR, VT, Expand);
setOperationAction(ISD::FCEIL, VT, Expand);
setOperationAction(ISD::FTRUNC, VT, Expand);
setOperationAction(ISD::FRINT, VT, Expand);
setOperationAction(ISD::FNEARBYINT, VT, Expand);
setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Expand);
setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Expand);
setOperationAction(ISD::BUILD_VECTOR, VT, Expand);

6
lib/Target/X86/X86ISelLowering.cpp
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@ -727,7 +727,7 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
// turn on ones that can be effectively codegen'd.
for (int i = MVT::FIRST_VECTOR_VALUETYPE;
i <= MVT::LAST_VECTOR_VALUETYPE; ++i) {
MVT::SimpleValueType VT = (MVT::SimpleValueType)i;
MVT VT = (MVT::SimpleValueType)i;
setOperationAction(ISD::ADD , VT, Expand);
setOperationAction(ISD::SUB , VT, Expand);
setOperationAction(ISD::FADD, VT, Expand);
@ -755,6 +755,10 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
setOperationAction(ISD::FSQRT, VT, Expand);
setOperationAction(ISD::FCOPYSIGN, VT, Expand);
setOperationAction(ISD::FFLOOR, VT, Expand);
setOperationAction(ISD::FCEIL, VT, Expand);
setOperationAction(ISD::FTRUNC, VT, Expand);
setOperationAction(ISD::FRINT, VT, Expand);
setOperationAction(ISD::FNEARBYINT, VT, Expand);
setOperationAction(ISD::SMUL_LOHI, VT, Expand);
setOperationAction(ISD::UMUL_LOHI, VT, Expand);
setOperationAction(ISD::SDIVREM, VT, Expand);