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Track allocatable instead of reserved regs, and never take an unallocatable hint.
llvm-svn: 103828
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97d22ade75
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21bd5b7fbb
@ -108,8 +108,8 @@ namespace {
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// instruction, and so cannot be allocated.
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BitVector UsedInInstr;
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// ReservedRegs - vector of reserved physical registers.
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BitVector ReservedRegs;
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// Allocatable - vector of allocatable physical registers.
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BitVector Allocatable;
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// atEndOfBlock - This flag is set after allocating all instructions in a
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// block, before emitting final spills. When it is set, LiveRegMap is no
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@ -394,7 +394,8 @@ RAFast::LiveRegMap::iterator RAFast::allocVirtReg(MachineBasicBlock &MBB,
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// Ignore invalid hints.
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if (Hint && (!TargetRegisterInfo::isPhysicalRegister(Hint) ||
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!RC->contains(Hint) || UsedInInstr.test(Hint)))
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!RC->contains(Hint) || UsedInInstr.test(Hint)) ||
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!Allocatable.test(Hint))
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Hint = 0;
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// If there is no hint, peek at the first use of this register.
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@ -404,7 +405,8 @@ RAFast::LiveRegMap::iterator RAFast::allocVirtReg(MachineBasicBlock &MBB,
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// Copy to physreg -> use physreg as hint.
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if (TII->isMoveInstr(MI, SrcReg, DstReg, SrcSubReg, DstSubReg) &&
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SrcReg == VirtReg && TargetRegisterInfo::isPhysicalRegister(DstReg) &&
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RC->contains(DstReg) && !UsedInInstr.test(DstReg)) {
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RC->contains(DstReg) && !UsedInInstr.test(DstReg) &&
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Allocatable.test(DstReg)) {
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Hint = DstReg;
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DEBUG(dbgs() << "%reg" << VirtReg << " gets hint from " << MI);
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}
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@ -413,7 +415,7 @@ RAFast::LiveRegMap::iterator RAFast::allocVirtReg(MachineBasicBlock &MBB,
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// Take hint when possible.
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if (Hint) {
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assert(RC->contains(Hint) && !UsedInInstr.test(Hint) &&
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"Invalid hint should have been cleared");
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Allocatable.test(Hint) && "Invalid hint should have been cleared");
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switch(PhysRegState[Hint]) {
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case regDisabled:
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case regReserved:
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@ -674,7 +676,7 @@ void RAFast::AllocateBasicBlock(MachineBasicBlock &MBB) {
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VirtOpEnd = i+1;
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continue;
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}
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if (ReservedRegs.test(Reg)) continue;
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if (!Allocatable.test(Reg)) continue;
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if (MO.isUse()) {
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usePhysReg(MO);
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} else if (MO.isEarlyClobber()) {
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@ -729,7 +731,7 @@ void RAFast::AllocateBasicBlock(MachineBasicBlock &MBB) {
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unsigned Reg = MO.getReg();
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if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
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if (ReservedRegs.test(Reg)) continue;
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if (!Allocatable.test(Reg)) continue;
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definePhysReg(MBB, MI, Reg, (MO.isImplicit() || MO.isDead()) ?
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regFree : regReserved);
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continue;
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@ -797,7 +799,7 @@ bool RAFast::runOnMachineFunction(MachineFunction &Fn) {
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TII = TM->getInstrInfo();
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UsedInInstr.resize(TRI->getNumRegs());
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ReservedRegs = TRI->getReservedRegs(*MF);
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Allocatable = TRI->getAllocatableSet(*MF);
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// initialize the virtual->physical register map to have a 'null'
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// mapping for all virtual registers
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