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[AArch64] Support HiSilicon's TSV110 processor
Reviewers: t.p.northover, SjoerdMeijer, kristof.beyls Reviewed By: kristof.beyls Subscribers: olista01, javed.absar, kristof.beyls, kristina, llvm-commits Differential Revision: https://reviews.llvm.org/D53908 llvm-svn: 346546
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@ -117,6 +117,9 @@ AARCH64_CPU_NAME("thunderxt81", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
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(AArch64::AEK_CRC | AArch64::AEK_PROFILE))
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AARCH64_CPU_NAME("thunderxt83", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
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(AArch64::AEK_CRC | AArch64::AEK_PROFILE))
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AARCH64_CPU_NAME("tsv110", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
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(AArch64::AEK_PROFILE | AArch64::AEK_FP16 | AArch64::AEK_FP16FML |
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AArch64::AEK_DOTPROD))
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// Invalid CPU
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AARCH64_CPU_NAME("invalid", INVALID, FK_INVALID, true, AArch64::AEK_INVALID)
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#undef AARCH64_CPU_NAME
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@ -211,6 +211,17 @@ StringRef sys::detail::getHostCPUNameForARM(StringRef ProcCpuinfoContent) {
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}
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}
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if (Implementer == "0x48") // HiSilicon Technologies, Inc.
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// Look for the CPU part line.
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for (unsigned I = 0, E = Lines.size(); I != E; ++I)
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if (Lines[I].startswith("CPU part"))
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// The CPU part is a 3 digit hexadecimal number with a 0x prefix. The
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// values correspond to the "Part number" in the CP15/c0 register. The
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// contents are specified in the various processor manuals.
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return StringSwitch<const char *>(Lines[I].substr(8).ltrim("\t :"))
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.Case("0xd01", "tsv110")
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.Default("generic");
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if (Implementer == "0x51") // Qualcomm Technologies, Inc.
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// Look for the CPU part line.
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for (unsigned I = 0, E = Lines.size(); I != E; ++I)
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@ -546,6 +546,21 @@ def ProcThunderXT83 : SubtargetFeature<"thunderxt83", "ARMProcFamily",
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FeaturePredictableSelectIsExpensive,
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FeatureNEON]>;
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def ProcTSV110 : SubtargetFeature<"tsv110", "ARMProcFamily", "TSV110",
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"HiSilicon TS-V110 processors", [
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HasV8_2aOps,
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FeatureCrypto,
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FeatureCustomCheapAsMoveHandling,
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FeatureFPARMv8,
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FeatureFuseAES,
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FeatureNEON,
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FeaturePerfMon,
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FeaturePostRAScheduler,
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FeatureSPE,
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FeatureFullFP16,
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FeatureFP16FML,
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FeatureDotProd]>;
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def : ProcessorModel<"generic", NoSchedModel, [
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FeatureFPARMv8,
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FeatureFuseAES,
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@ -578,6 +593,8 @@ def : ProcessorModel<"thunderxt81", ThunderXT8XModel, [ProcThunderXT81]>;
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def : ProcessorModel<"thunderxt83", ThunderXT8XModel, [ProcThunderXT83]>;
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// Cavium ThunderX2T9X Processors. Formerly Broadcom Vulcan.
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def : ProcessorModel<"thunderx2t99", ThunderX2T99Model, [ProcThunderX2T99]>;
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// FIXME: HiSilicon TSV110 is currently modeled as a Cortex-A57.
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def : ProcessorModel<"tsv110", CortexA57Model, [ProcTSV110]>;
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//===----------------------------------------------------------------------===//
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// Assembly parser
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@ -148,6 +148,11 @@ void AArch64Subtarget::initializeProperties() {
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// FIXME: remove this to enable 64-bit SLP if performance looks good.
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MinVectorRegisterBitWidth = 128;
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break;
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case TSV110:
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CacheLineSize = 64;
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PrefFunctionAlignment = 4;
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PrefLoopAlignment = 2;
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break;
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}
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}
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@ -56,7 +56,8 @@ public:
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ThunderX,
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ThunderXT81,
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ThunderXT83,
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ThunderXT88
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ThunderXT88,
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TSV110
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};
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protected:
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@ -17,6 +17,7 @@
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; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=saphira 2>&1 | FileCheck %s
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; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=kryo 2>&1 | FileCheck %s
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; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=thunderx2t99 2>&1 | FileCheck %s
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; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=tsv110 2>&1 | FileCheck %s
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; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=INVALID
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; CHECK-NOT: {{.*}} is not a recognized processor for this target
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@ -13,6 +13,7 @@
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; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=saphira -o - %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=kryo -o - %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=thunderx2t99 -o - %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=tsv110 -o - %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnuabi -mattr=+custom-cheap-as-move -o - %s | FileCheck %s
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%X = type { i64, i64, i64 }
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@ -3,6 +3,8 @@
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// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mcpu=cortex-a55 -show-encoding < %s 2> %t | FileCheck %s
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// RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s
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// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mcpu=cortex-a75 -show-encoding < %s 2> %t | FileCheck %s
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// RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s
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// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mcpu=tsv110 -show-encoding < %s 2> %t | FileCheck %s
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// RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s
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.text
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@ -1,6 +1,7 @@
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// RUN: llvm-mc -triple aarch64 -mattr=+dotprod -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
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// RUN: llvm-mc -triple aarch64 -mcpu=cortex-a75 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
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// RUN: llvm-mc -triple aarch64 -mcpu=cortex-a55 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
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// RUN: llvm-mc -triple aarch64 -mcpu=tsv110 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-DOTPROD
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// RUN: not llvm-mc -triple aarch64 -mattr=+v8.2a -show-encoding < %s 2> %t
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// RUN: FileCheck --check-prefix=CHECK-NO-DOTPROD < %t %s
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@ -5,6 +5,8 @@
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// RUN: FileCheck %s --check-prefix=CRC
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// RUN: llvm-mc -triple aarch64-- -mcpu=cortex-a75 %s 2>&1 |\
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// RUN: FileCheck %s --check-prefix=CRC
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// RUN: llvm-mc -triple aarch64-- -mcpu=tsv110 %s 2>&1 |\
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// RUN: FileCheck %s --check-prefix=CRC
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// RUN: not llvm-mc -triple aarch64-- %s 2>&1 |\
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// RUN: FileCheck %s --check-prefix=NOCRC
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@ -1,6 +1,7 @@
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// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+ras < %s | FileCheck %s
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// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mcpu=cortex-a55 < %s | FileCheck %s
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// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mcpu=cortex-a75 < %s | FileCheck %s
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// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mcpu=tsv110 < %s | FileCheck %s
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esb
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// CHECK: esb // encoding: [0x1f,0x22,0x03,0xd5]
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@ -1,6 +1,7 @@
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# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+dotprod --disassemble < %s | FileCheck %s
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# RUN: llvm-mc -triple aarch64-none-linux-gnu -mcpu=cortex-a75 --disassemble < %s | FileCheck %s
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# RUN: llvm-mc -triple aarch64-none-linux-gnu -mcpu=cortex-a55 --disassemble < %s | FileCheck %s
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# RUN: llvm-mc -triple aarch64-none-linux-gnu -mcpu=tsv110 --disassemble < %s | FileCheck %s
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# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=-dotprod --disassemble < %s 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
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0x20,0x94,0x82,0x2e
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@ -242,6 +242,11 @@ CPU part : 0x0a1
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"CPU implementer : 0x43\n"
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"CPU part : 0xa1"),
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"thunderxt88");
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// Verify HiSilicon processors.
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x48\n"
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"CPU part : 0xd01"),
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"tsv110");
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}
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#if defined(__APPLE__)
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@ -488,7 +488,7 @@ TEST(TargetParserTest, testARMExtension) {
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ARM::ArchKind::ARMV7EM, "crypto"));
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EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV8A, "ras"));
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EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV8_1A, "ras"));
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EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV8_2A, "spe"));
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EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV8_2A, "profile"));
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EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV8_2A, "fp16"));
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EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV8_2A, "fp16fml"));
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EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV8_3A, "fp16"));
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@ -795,9 +795,16 @@ TEST(TargetParserTest, testAArch64CPU) {
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AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_SIMD |
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AArch64::AEK_FP | AArch64::AEK_PROFILE,
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"8-A"));
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EXPECT_TRUE(testAArch64CPU(
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"tsv110", "armv8.2-a", "crypto-neon-fp-armv8",
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AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
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AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
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AArch64::AEK_RDM | AArch64::AEK_PROFILE | AArch64::AEK_FP16 |
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AArch64::AEK_FP16FML | AArch64::AEK_DOTPROD,
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"8.2-A"));
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}
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static constexpr unsigned NumAArch64CPUArchs = 20;
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static constexpr unsigned NumAArch64CPUArchs = 21;
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TEST(TargetParserTest, testAArch64CPUArchList) {
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SmallVector<StringRef, NumAArch64CPUArchs> List;
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@ -888,10 +895,14 @@ TEST(TargetParserTest, testAArch64Extension) {
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AArch64::ArchKind::INVALID, "fp16"));
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EXPECT_FALSE(testAArch64Extension("cortex-a55",
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AArch64::ArchKind::INVALID, "fp16fml"));
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EXPECT_TRUE(testAArch64Extension("cortex-a55",
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AArch64::ArchKind::INVALID, "dotprod"));
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EXPECT_TRUE(testAArch64Extension("cortex-a75",
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AArch64::ArchKind::INVALID, "fp16"));
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EXPECT_FALSE(testAArch64Extension("cortex-a75",
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AArch64::ArchKind::INVALID, "fp16fml"));
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EXPECT_TRUE(testAArch64Extension("cortex-a75",
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AArch64::ArchKind::INVALID, "dotprod"));
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EXPECT_FALSE(testAArch64Extension("thunderx2t99",
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AArch64::ArchKind::INVALID, "ras"));
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EXPECT_FALSE(testAArch64Extension("thunderx",
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@ -902,13 +913,29 @@ TEST(TargetParserTest, testAArch64Extension) {
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AArch64::ArchKind::INVALID, "lse"));
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EXPECT_FALSE(testAArch64Extension("thunderxt88",
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AArch64::ArchKind::INVALID, "lse"));
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EXPECT_TRUE(testAArch64Extension("tsv110",
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AArch64::ArchKind::INVALID, "crypto"));
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EXPECT_FALSE(testAArch64Extension("tsv110",
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AArch64::ArchKind::INVALID, "sha3"));
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EXPECT_FALSE(testAArch64Extension("tsv110",
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AArch64::ArchKind::INVALID, "sm4"));
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EXPECT_TRUE(testAArch64Extension("tsv110",
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AArch64::ArchKind::INVALID, "ras"));
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EXPECT_TRUE(testAArch64Extension("tsv110",
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AArch64::ArchKind::INVALID, "profile"));
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EXPECT_TRUE(testAArch64Extension("tsv110",
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AArch64::ArchKind::INVALID, "fp16"));
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EXPECT_TRUE(testAArch64Extension("tsv110",
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AArch64::ArchKind::INVALID, "fp16fml"));
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EXPECT_TRUE(testAArch64Extension("tsv110",
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AArch64::ArchKind::INVALID, "dotprod"));
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EXPECT_FALSE(testAArch64Extension(
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"generic", AArch64::ArchKind::ARMV8A, "ras"));
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EXPECT_FALSE(testAArch64Extension(
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"generic", AArch64::ArchKind::ARMV8_1A, "ras"));
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EXPECT_FALSE(testAArch64Extension(
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"generic", AArch64::ArchKind::ARMV8_2A, "spe"));
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"generic", AArch64::ArchKind::ARMV8_2A, "profile"));
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EXPECT_FALSE(testAArch64Extension(
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"generic", AArch64::ArchKind::ARMV8_2A, "fp16"));
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EXPECT_FALSE(testAArch64Extension(
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