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X86-64: Mark WINCALL and more tail call instructions as code gen only.

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llvm-svn: 108685
This commit is contained in:
Daniel Dunbar 2010-07-19 07:21:07 +00:00
parent fa2847103d
commit 220bd809bf
2 changed files with 4 additions and 3 deletions
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5
lib/Target/X86/X86Instr64bit.td
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@ -158,7 +158,7 @@ let isCall = 1 in
// FIXME: We need to teach codegen about single list of call-clobbered // FIXME: We need to teach codegen about single list of call-clobbered
// registers. // registers.
let isCall = 1 in let isCall = 1, isCodeGenOnly = 1 in
// All calls clobber the non-callee saved registers. RSP is marked as // All calls clobber the non-callee saved registers. RSP is marked as
// a use to prevent stack-pointer assignments that appear immediately // a use to prevent stack-pointer assignments that appear immediately
// before calls from potentially appearing dead. Uses for argument // before calls from potentially appearing dead. Uses for argument
@ -182,7 +182,8 @@ let isCall = 1 in
} }
let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1,
isCodeGenOnly = 1 in
let Defs = [RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11, let Defs = [RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11,
FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0, ST1, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0, ST1,
MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,

2
test/MC/AsmParser/X86/x86_instructions.s
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@ -56,7 +56,7 @@
subl %eax, %ebx subl %eax, %ebx
// FIXME: Check that this matches the correct instruction. // FIXME: Check that this matches the correct instruction.
// CHECK: call *%rax // CHECK: callq *%rax
call *%rax call *%rax
// FIXME: Check that this matches the correct instruction. // FIXME: Check that this matches the correct instruction.