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TableGen: Delete some copy constuctors

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Some register related machinery relies on uniqued, static pointers for
register classes and subregisters, so try to make sure these are never
copied.
This commit is contained in:
Matt Arsenault 2020-01-14 13:01:46 -05:00 committed by Matt Arsenault
parent 6f8d4d409e
commit 222988e058
2 changed files with 6 additions and 3 deletions
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3
utils/TableGen/CodeGenRegisters.h
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@ -86,6 +86,7 @@ namespace llvm {
CodeGenSubRegIndex(Record *R, unsigned Enum); CodeGenSubRegIndex(Record *R, unsigned Enum);
CodeGenSubRegIndex(StringRef N, StringRef Nspace, unsigned Enum); CodeGenSubRegIndex(StringRef N, StringRef Nspace, unsigned Enum);
CodeGenSubRegIndex(CodeGenSubRegIndex&) = delete;
const std::string &getName() const { return Name; } const std::string &getName() const { return Name; }
const std::string &getNamespace() const { return Namespace; } const std::string &getNamespace() const { return Namespace; }
@ -442,6 +443,7 @@ namespace llvm {
std::vector<unsigned> &RegUnits) const; std::vector<unsigned> &RegUnits) const;
CodeGenRegisterClass(CodeGenRegBank&, Record *R); CodeGenRegisterClass(CodeGenRegBank&, Record *R);
CodeGenRegisterClass(CodeGenRegisterClass&) = delete;
// A key representing the parts of a register class used for forming // A key representing the parts of a register class used for forming
// sub-classes. Note the ordering provided by this key is not the same as // sub-classes. Note the ordering provided by this key is not the same as
@ -611,6 +613,7 @@ namespace llvm {
public: public:
CodeGenRegBank(RecordKeeper&, const CodeGenHwModes&); CodeGenRegBank(RecordKeeper&, const CodeGenHwModes&);
CodeGenRegBank(CodeGenRegBank&) = delete;
SetTheory &getSets() { return Sets; } SetTheory &getSets() { return Sets; }

6
utils/TableGen/RISCVCompressInstEmitter.cpp
View File

@ -141,7 +141,7 @@ bool RISCVCompressInstEmitter::validateRegister(Record *Reg, Record *RegClass) {
assert(Reg->isSubClassOf("Register") && "Reg record should be a Register\n"); assert(Reg->isSubClassOf("Register") && "Reg record should be a Register\n");
assert(RegClass->isSubClassOf("RegisterClass") && "RegClass record should be" assert(RegClass->isSubClassOf("RegisterClass") && "RegClass record should be"
" a RegisterClass\n"); " a RegisterClass\n");
CodeGenRegisterClass RC = Target.getRegisterClass(RegClass); const CodeGenRegisterClass &RC = Target.getRegisterClass(RegClass);
const CodeGenRegister *R = Target.getRegisterByName(Reg->getName().lower()); const CodeGenRegister *R = Target.getRegisterByName(Reg->getName().lower());
assert((R != nullptr) && assert((R != nullptr) &&
("Register" + Reg->getName().str() + " not defined!!\n").c_str()); ("Register" + Reg->getName().str() + " not defined!!\n").c_str());
@ -160,8 +160,8 @@ bool RISCVCompressInstEmitter::validateTypes(Record *DagOpType,
if (DagOpType->isSubClassOf("RegisterClass") && if (DagOpType->isSubClassOf("RegisterClass") &&
InstOpType->isSubClassOf("RegisterClass")) { InstOpType->isSubClassOf("RegisterClass")) {
CodeGenRegisterClass RC = Target.getRegisterClass(InstOpType); const CodeGenRegisterClass &RC = Target.getRegisterClass(InstOpType);
CodeGenRegisterClass SubRC = Target.getRegisterClass(DagOpType); const CodeGenRegisterClass &SubRC = Target.getRegisterClass(DagOpType);
return RC.hasSubClass(&SubRC); return RC.hasSubClass(&SubRC);
} }