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[AMDGPU] Runtime metadata fixes:
- Verify that runtime metadata is actually valid runtime metadata when assembling, otherwise we could accept the following when assembling, but ocl runtime will reject it:
.amdgpu_runtime_metadata
{ amd.MDVersion: [ 2, 1 ], amd.RandomUnknownKey, amd.IsaInfo: ...
- Make IsaInfo optional, and always emit it.
Differential Revision: https://reviews.llvm.org/D30349
llvm-svn: 296324
This commit is contained in:
Konstantin Zhuravlyov
parent
bcfe1c3171
commit
22783c58d6
@ -789,12 +789,12 @@ public:
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: MCTargetAsmParser(Options, STI), MII(MII), Parser(_Parser) {
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MCAsmParserExtension::Initialize(Parser);
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if (getSTI().getFeatureBits().none()) {
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if (getFeatureBits().none()) {
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// Set default features.
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copySTI().ToggleFeature("SOUTHERN_ISLANDS");
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}
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setAvailableFeatures(ComputeAvailableFeatures(getSTI().getFeatureBits()));
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setAvailableFeatures(ComputeAvailableFeatures(getFeatureBits()));
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{
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// TODO: make those pre-defined variables read-only.
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@ -802,7 +802,7 @@ public:
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// MCSymbol::isRedefinable is intended for another purpose, and
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// AsmParser::parseDirectiveSet() cannot be specialized for specific target.
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AMDGPU::IsaInfo::IsaVersion ISA =
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AMDGPU::IsaInfo::getIsaVersion(getSTI().getFeatureBits());
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AMDGPU::IsaInfo::getIsaVersion(getFeatureBits());
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MCContext &Ctx = getContext();
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MCSymbol *Sym =
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Ctx.getOrCreateSymbol(Twine(".option.machine_version_major"));
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@ -828,7 +828,7 @@ public:
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}
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bool hasInv2PiInlineImm() const {
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return getSTI().getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm];
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return getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm];
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}
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bool hasSGPR102_SGPR103() const {
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@ -850,6 +850,10 @@ public:
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return &MII;
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}
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const FeatureBitset &getFeatureBits() const {
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return getSTI().getFeatureBits();
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}
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void setForcedEncodingSize(unsigned Size) { ForcedEncodingSize = Size; }
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void setForcedDPP(bool ForceDPP_) { ForcedDPP = ForceDPP_; }
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void setForcedSDWA(bool ForceSDWA_) { ForcedSDWA = ForceSDWA_; }
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@ -1870,7 +1874,7 @@ bool AMDGPUAsmParser::ParseDirectiveHSACodeObjectISA() {
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// targeted GPU.
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if (getLexer().is(AsmToken::EndOfStatement)) {
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AMDGPU::IsaInfo::IsaVersion ISA =
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AMDGPU::IsaInfo::getIsaVersion(getSTI().getFeatureBits());
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AMDGPU::IsaInfo::getIsaVersion(getFeatureBits());
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getTargetStreamer().EmitDirectiveHSACodeObjectISA(ISA.Major, ISA.Minor,
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ISA.Stepping,
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"AMD", "AMDGPU");
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@ -1947,7 +1951,8 @@ bool AMDGPUAsmParser::ParseDirectiveRuntimeMetadata() {
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MS.flush();
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getTargetStreamer().EmitRuntimeMetadata(Metadata);
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if (getTargetStreamer().EmitRuntimeMetadata(getFeatureBits(), Metadata))
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return Error(getParser().getTok().getLoc(), "invalid runtime metadata");
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return false;
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}
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@ -1965,7 +1970,7 @@ bool AMDGPUAsmParser::ParseAMDKernelCodeTValue(StringRef ID,
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bool AMDGPUAsmParser::ParseDirectiveAMDKernelCodeT() {
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amd_kernel_code_t Header;
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AMDGPU::initDefaultAMDKernelCodeT(Header, getSTI().getFeatureBits());
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AMDGPU::initDefaultAMDKernelCodeT(Header, getFeatureBits());
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while (true) {
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// Lex EndOfStatement. This is in a while loop, because lexing a comment
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@ -2459,7 +2464,7 @@ bool AMDGPUAsmParser::parseCnt(int64_t &IntVal) {
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Parser.Lex();
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AMDGPU::IsaInfo::IsaVersion ISA =
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AMDGPU::IsaInfo::getIsaVersion(getSTI().getFeatureBits());
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AMDGPU::IsaInfo::getIsaVersion(getFeatureBits());
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if (CntName == "vmcnt")
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IntVal = encodeVmcnt(ISA, IntVal, CntVal);
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else if (CntName == "expcnt")
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@ -2475,7 +2480,7 @@ bool AMDGPUAsmParser::parseCnt(int64_t &IntVal) {
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OperandMatchResultTy
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AMDGPUAsmParser::parseSWaitCntOps(OperandVector &Operands) {
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AMDGPU::IsaInfo::IsaVersion ISA =
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AMDGPU::IsaInfo::getIsaVersion(getSTI().getFeatureBits());
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AMDGPU::IsaInfo::getIsaVersion(getFeatureBits());
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int64_t Waitcnt = getWaitcntBitMask(ISA);
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SMLoc S = Parser.getTok().getLoc();
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@ -38,6 +38,7 @@
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#include <vector>
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using namespace llvm;
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using namespace llvm::AMDGPU::IsaInfo;
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using namespace ::AMDGPU::RuntimeMD;
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static cl::opt<bool>
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@ -88,7 +89,7 @@ template <> struct MappingTraits<Kernel::Metadata> {
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INVALID_KERNEL_INDEX);
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YamlIO.mapOptional(KeyName::NoPartialWorkGroups, K.NoPartialWorkGroups,
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uint8_t(0));
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YamlIO.mapRequired(KeyName::Args, K.Args);
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YamlIO.mapOptional(KeyName::Args, K.Args);
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}
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static const bool flow = true;
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};
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@ -116,7 +117,7 @@ template <> struct MappingTraits<IsaInfo::Metadata> {
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template <> struct MappingTraits<Program::Metadata> {
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static void mapping(IO &YamlIO, Program::Metadata &Prog) {
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YamlIO.mapRequired(KeyName::MDVersion, Prog.MDVersionSeq);
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YamlIO.mapRequired(KeyName::IsaInfo, Prog.IsaInfo);
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YamlIO.mapOptional(KeyName::IsaInfo, Prog.IsaInfo);
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YamlIO.mapOptional(KeyName::PrintfInfo, Prog.PrintfInfo);
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YamlIO.mapOptional(KeyName::Kernels, Prog.Kernels);
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}
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@ -375,6 +376,20 @@ static Kernel::Metadata getRuntimeMDForKernel(const Function &F) {
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return Kernel;
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}
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static void getIsaInfo(const FeatureBitset &Features, IsaInfo::Metadata &IIM) {
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IIM.WavefrontSize = getWavefrontSize(Features);
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IIM.LocalMemorySize = getLocalMemorySize(Features);
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IIM.EUsPerCU = getEUsPerCU(Features);
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IIM.MaxWavesPerEU = getMaxWavesPerEU(Features);
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IIM.MaxFlatWorkGroupSize = getMaxFlatWorkGroupSize(Features);
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IIM.SGPRAllocGranule = getSGPRAllocGranule(Features);
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IIM.TotalNumSGPRs = getTotalNumSGPRs(Features);
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IIM.AddressableNumSGPRs = getAddressableNumSGPRs(Features);
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IIM.VGPRAllocGranule = getVGPRAllocGranule(Features);
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IIM.TotalNumVGPRs = getTotalNumVGPRs(Features);
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IIM.AddressableNumVGPRs = getAddressableNumVGPRs(Features);
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}
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Program::Metadata::Metadata(const std::string &YAML) {
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yaml::Input Input(YAML);
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Input >> *this;
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@ -411,18 +426,7 @@ std::string llvm::getRuntimeMDYAMLString(const FeatureBitset &Features,
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Prog.MDVersionSeq.push_back(MDVersion);
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Prog.MDVersionSeq.push_back(MDRevision);
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IsaInfo::Metadata &IIM = Prog.IsaInfo;
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IIM.WavefrontSize = AMDGPU::IsaInfo::getWavefrontSize(Features);
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IIM.LocalMemorySize = AMDGPU::IsaInfo::getLocalMemorySize(Features);
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IIM.EUsPerCU = AMDGPU::IsaInfo::getEUsPerCU(Features);
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IIM.MaxWavesPerEU = AMDGPU::IsaInfo::getMaxWavesPerEU(Features);
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IIM.MaxFlatWorkGroupSize = AMDGPU::IsaInfo::getMaxFlatWorkGroupSize(Features);
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IIM.SGPRAllocGranule = AMDGPU::IsaInfo::getSGPRAllocGranule(Features);
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IIM.TotalNumSGPRs = AMDGPU::IsaInfo::getTotalNumSGPRs(Features);
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IIM.AddressableNumSGPRs = AMDGPU::IsaInfo::getAddressableNumSGPRs(Features);
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IIM.VGPRAllocGranule = AMDGPU::IsaInfo::getVGPRAllocGranule(Features);
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IIM.TotalNumVGPRs = AMDGPU::IsaInfo::getTotalNumVGPRs(Features);
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IIM.AddressableNumVGPRs = AMDGPU::IsaInfo::getAddressableNumVGPRs(Features);
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getIsaInfo(Features, Prog.IsaInfo);
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// Set PrintfInfo.
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if (auto MD = M.getNamedMetadata("llvm.printf.fmts")) {
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@ -451,3 +455,16 @@ std::string llvm::getRuntimeMDYAMLString(const FeatureBitset &Features,
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return YAML;
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}
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ErrorOr<std::string> llvm::getRuntimeMDYAMLString(const FeatureBitset &Features,
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StringRef YAML) {
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Program::Metadata Prog;
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yaml::Input Input(YAML);
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Input >> Prog;
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getIsaInfo(Features, Prog.IsaInfo);
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if (Input.error())
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return Input.error();
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return Prog.toYAML();
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}
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@ -14,15 +14,20 @@
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#ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPURUNTIMEMD_H
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#define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPURUNTIMEMD_H
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#include "llvm/Support/ErrorOr.h"
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#include <string>
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namespace llvm {
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class FeatureBitset;
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class Module;
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// Get runtime metadata as YAML string.
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/// \returns Runtime metadata as YAML string.
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std::string getRuntimeMDYAMLString(const FeatureBitset &Features,
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const Module &M);
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/// \returns \p YAML if \p YAML is valid runtime metadata, error otherwise.
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ErrorOr<std::string> getRuntimeMDYAMLString(const FeatureBitset &Features,
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StringRef YAML);
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}
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#endif
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@ -100,10 +100,17 @@ void AMDGPUTargetAsmStreamer::EmitRuntimeMetadata(const FeatureBitset &Features,
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OS << "\n\t.end_amdgpu_runtime_metadata\n";
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}
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void AMDGPUTargetAsmStreamer::EmitRuntimeMetadata(StringRef Metadata) {
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bool AMDGPUTargetAsmStreamer::EmitRuntimeMetadata(const FeatureBitset &Features,
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StringRef Metadata) {
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auto VerifiedMetadata = getRuntimeMDYAMLString(Features, Metadata);
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if (!VerifiedMetadata)
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return true;
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OS << "\t.amdgpu_runtime_metadata";
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OS << Metadata;
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OS << VerifiedMetadata.get();
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OS << "\t.end_amdgpu_runtime_metadata\n";
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return false;
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}
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//===----------------------------------------------------------------------===//
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@ -216,7 +223,12 @@ void AMDGPUTargetELFStreamer::EmitAMDGPUHsaProgramScopeGlobal(
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Symbol->setBinding(ELF::STB_GLOBAL);
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}
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void AMDGPUTargetELFStreamer::EmitRuntimeMetadata(StringRef Metadata) {
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bool AMDGPUTargetELFStreamer::EmitRuntimeMetadata(const FeatureBitset &Features,
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StringRef Metadata) {
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auto VerifiedMetadata = getRuntimeMDYAMLString(Features, Metadata);
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if (!VerifiedMetadata)
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return true;
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// Create two labels to mark the beginning and end of the desc field
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// and a MCExpr to calculate the size of the desc field.
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auto &Context = getContext();
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@ -231,13 +243,15 @@ void AMDGPUTargetELFStreamer::EmitRuntimeMetadata(StringRef Metadata) {
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PT_NOTE::NT_AMDGPU_HSA_RUNTIME_METADATA,
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[&](MCELFStreamer &OS) {
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OS.EmitLabel(DescBegin);
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OS.EmitBytes(Metadata);
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OS.EmitBytes(VerifiedMetadata.get());
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OS.EmitLabel(DescEnd);
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}
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);
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return false;
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}
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void AMDGPUTargetELFStreamer::EmitRuntimeMetadata(const FeatureBitset &Features,
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const Module &M) {
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EmitRuntimeMetadata(getRuntimeMDYAMLString(Features, M));
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EmitRuntimeMetadata(Features, getRuntimeMDYAMLString(Features, M));
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}
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@ -50,7 +50,9 @@ public:
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virtual void EmitRuntimeMetadata(const FeatureBitset &Features,
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const Module &M) = 0;
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virtual void EmitRuntimeMetadata(StringRef Metadata) = 0;
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/// \returns False on success, true on failure.
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virtual bool EmitRuntimeMetadata(const FeatureBitset &Features,
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StringRef Metadata) = 0;
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};
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class AMDGPUTargetAsmStreamer : public AMDGPUTargetStreamer {
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@ -75,7 +77,9 @@ public:
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void EmitRuntimeMetadata(const FeatureBitset &Features,
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const Module &M) override;
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void EmitRuntimeMetadata(StringRef Metadata) override;
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/// \returns False on success, true on failure.
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bool EmitRuntimeMetadata(const FeatureBitset &Features,
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StringRef Metadata) override;
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};
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class AMDGPUTargetELFStreamer : public AMDGPUTargetStreamer {
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@ -107,7 +111,9 @@ public:
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void EmitRuntimeMetadata(const FeatureBitset &Features,
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const Module &M) override;
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void EmitRuntimeMetadata(StringRef Metadata) override;
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/// \returns False on success, true on failure.
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bool EmitRuntimeMetadata(const FeatureBitset &Features,
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StringRef Metadata) override;
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};
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}
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@ -48,13 +48,13 @@
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.end_amdgpu_runtime_metadata
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// ASM: .amdgpu_runtime_metadata
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// ASM: {
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// ASM: amd.MDVersion: [ 2, 0 ]
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// ASM: amd.Kernels: [
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// ASM: { amd.KernelName: amd_kernel_code_t_test_all },
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// ASM: { amd.KernelName: amd_kernel_code_t_minimal }
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// ASM: ]
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// ASM: }
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// ASM: {
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// ASM: amd.MDVersion: [ 2, 0 ]
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// ASM: amd.IsaInfo: { amd.IsaInfoWavefrontSize: 64, amd.IsaInfoLocalMemorySize: 65536, amd.IsaInfoEUsPerCU: 4, amd.IsaInfoMaxWavesPerEU: 10, amd.IsaInfoMaxFlatWorkGroupSize: 2048, amd.IsaInfoSGPRAllocGranule: 8, amd.IsaInfoTotalNumSGPRs: 512, amd.IsaInfoAddressableNumSGPRs: 104, amd.IsaInfoVGPRAllocGranule: 4, amd.IsaInfoTotalNumVGPRs: 256, amd.IsaInfoAddressableNumVGPRs: 256 },
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// ASM: amd.Kernels:
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// ASM: - { amd.KernelName: amd_kernel_code_t_test_all }
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// ASM: - { amd.KernelName: amd_kernel_code_t_minimal }
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// ASM: }
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// ASM: .end_amdgpu_runtime_metadata
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.amdgpu_hsa_kernel amd_kernel_code_t_test_all
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@ -1,35 +0,0 @@
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// RUN: llvm-mc -triple amdgcn--amdhsa -mcpu=kaveri -show-encoding %s | FileCheck %s --check-prefix=ASM
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.amdgpu_runtime_metadata
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{ amd.MDVersion: [ 2, 0 ], amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:
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- { amd.KernelName: test_char, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:
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- { amd.ArgSize: 1, amd.ArgAlign: 1, amd.ArgKind: 0, amd.ArgValueType: 1, amd.ArgTypeName: char, amd.ArgAccQual: 0 }
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- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }
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- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }
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- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }
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- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }
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- { amd.KernelName: test_ushort2, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:
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- { amd.ArgSize: 4, amd.ArgAlign: 4, amd.ArgKind: 0, amd.ArgValueType: 4, amd.ArgTypeName: ushort2, amd.ArgAccQual: 0 }
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- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }
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- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }
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- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }
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- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }
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}
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.end_amdgpu_runtime_metadata
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// ASM: { amd.MDVersion: [ 2, 0 ], amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:
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// ASM: - { amd.KernelName: test_char, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:
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// ASM: - { amd.ArgSize: 1, amd.ArgAlign: 1, amd.ArgKind: 0, amd.ArgValueType: 1, amd.ArgTypeName: char, amd.ArgAccQual: 0 }
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// ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }
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// ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }
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// ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }
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// ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }
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// ASM: - { amd.KernelName: test_ushort2, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:
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// ASM: - { amd.ArgSize: 4, amd.ArgAlign: 4, amd.ArgKind: 0, amd.ArgValueType: 4, amd.ArgTypeName: ushort2, amd.ArgAccQual: 0 }
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// ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }
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// ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }
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// ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }
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// ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }
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// ASM: }
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39
test/MC/AMDGPU/runtime-metadata-1.s
Normal file
39
test/MC/AMDGPU/runtime-metadata-1.s
Normal file
@ -0,0 +1,39 @@
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// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx700 -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX700
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// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx800 -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX800
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// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX900
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.amdgpu_runtime_metadata
|
||||
{ amd.MDVersion: [ 2, 1 ], amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:
|
||||
- { amd.KernelName: test_char, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:
|
||||
- { amd.ArgSize: 1, amd.ArgAlign: 1, amd.ArgKind: 0, amd.ArgValueType: 1, amd.ArgTypeName: char, amd.ArgAccQual: 0 }
|
||||
- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }
|
||||
- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }
|
||||
- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }
|
||||
- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }
|
||||
- { amd.KernelName: test_ushort2, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:
|
||||
- { amd.ArgSize: 4, amd.ArgAlign: 4, amd.ArgKind: 0, amd.ArgValueType: 4, amd.ArgTypeName: ushort2, amd.ArgAccQual: 0 }
|
||||
- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }
|
||||
- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }
|
||||
- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }
|
||||
- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }
|
||||
}
|
||||
.end_amdgpu_runtime_metadata
|
||||
|
||||
// GFX700: { amd.MDVersion: [ 2, 1 ], amd.IsaInfo: { amd.IsaInfoWavefrontSize: 64, amd.IsaInfoLocalMemorySize: 65536, amd.IsaInfoEUsPerCU: 4, amd.IsaInfoMaxWavesPerEU: 10, amd.IsaInfoMaxFlatWorkGroupSize: 2048, amd.IsaInfoSGPRAllocGranule: 8, amd.IsaInfoTotalNumSGPRs: 512, amd.IsaInfoAddressableNumSGPRs: 104, amd.IsaInfoVGPRAllocGranule: 4, amd.IsaInfoTotalNumVGPRs: 256, amd.IsaInfoAddressableNumVGPRs: 256 }, amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:
|
||||
|
||||
// GFX800: { amd.MDVersion: [ 2, 1 ], amd.IsaInfo: { amd.IsaInfoWavefrontSize: 64, amd.IsaInfoLocalMemorySize: 65536, amd.IsaInfoEUsPerCU: 4, amd.IsaInfoMaxWavesPerEU: 10, amd.IsaInfoMaxFlatWorkGroupSize: 2048, amd.IsaInfoSGPRAllocGranule: 16, amd.IsaInfoTotalNumSGPRs: 800, amd.IsaInfoAddressableNumSGPRs: 96, amd.IsaInfoVGPRAllocGranule: 4, amd.IsaInfoTotalNumVGPRs: 256, amd.IsaInfoAddressableNumVGPRs: 256 }, amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:
|
||||
|
||||
// GFX900: { amd.MDVersion: [ 2, 1 ], amd.IsaInfo: { amd.IsaInfoWavefrontSize: 64, amd.IsaInfoLocalMemorySize: 65536, amd.IsaInfoEUsPerCU: 4, amd.IsaInfoMaxWavesPerEU: 10, amd.IsaInfoMaxFlatWorkGroupSize: 2048, amd.IsaInfoSGPRAllocGranule: 16, amd.IsaInfoTotalNumSGPRs: 800, amd.IsaInfoAddressableNumSGPRs: 102, amd.IsaInfoVGPRAllocGranule: 4, amd.IsaInfoTotalNumVGPRs: 256, amd.IsaInfoAddressableNumVGPRs: 256 }, amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:
|
||||
|
||||
// GCN: - { amd.KernelName: test_char, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:
|
||||
// GCN-NEXT: - { amd.ArgSize: 1, amd.ArgAlign: 1, amd.ArgKind: 0, amd.ArgValueType: 1, amd.ArgTypeName: char, amd.ArgAccQual: 0 }
|
||||
// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }
|
||||
// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }
|
||||
// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }
|
||||
// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }
|
||||
// GCN-NEXT: - { amd.KernelName: test_ushort2, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:
|
||||
// GCN-NEXT: - { amd.ArgSize: 4, amd.ArgAlign: 4, amd.ArgKind: 0, amd.ArgValueType: 4, amd.ArgTypeName: ushort2, amd.ArgAccQual: 0 }
|
||||
// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }
|
||||
// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }
|
||||
// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }
|
||||
// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } } }
|
||||
39
test/MC/AMDGPU/runtime-metadata-2.s
Normal file
39
test/MC/AMDGPU/runtime-metadata-2.s
Normal file
@ -0,0 +1,39 @@
|
||||
// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx700 -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX700
|
||||
// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx800 -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX800
|
||||
// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX900
|
||||
|
||||
.amdgpu_runtime_metadata
|
||||
{ amd.MDVersion: [ 2, 1 ], amd.IsaInfo: { amd.IsaInfoWavefrontSize: 64, amd.IsaInfoLocalMemorySize: 65536, amd.IsaInfoEUsPerCU: 4, amd.IsaInfoMaxWavesPerEU: 10, amd.IsaInfoMaxFlatWorkGroupSize: 2048, amd.IsaInfoSGPRAllocGranule: 8, amd.IsaInfoTotalNumSGPRs: 512, amd.IsaInfoAddressableNumSGPRs: 104, amd.IsaInfoVGPRAllocGranule: 4, amd.IsaInfoTotalNumVGPRs: 256, amd.IsaInfoAddressableNumVGPRs: 256 }, amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:
|
||||
- { amd.KernelName: test_char, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:
|
||||
- { amd.ArgSize: 1, amd.ArgAlign: 1, amd.ArgKind: 0, amd.ArgValueType: 1, amd.ArgTypeName: char, amd.ArgAccQual: 0 }
|
||||
- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }
|
||||
- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }
|
||||
- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }
|
||||
- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }
|
||||
- { amd.KernelName: test_ushort2, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:
|
||||
- { amd.ArgSize: 4, amd.ArgAlign: 4, amd.ArgKind: 0, amd.ArgValueType: 4, amd.ArgTypeName: ushort2, amd.ArgAccQual: 0 }
|
||||
- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }
|
||||
- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }
|
||||
- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }
|
||||
- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }
|
||||
}
|
||||
.end_amdgpu_runtime_metadata
|
||||
|
||||
// GFX700: { amd.MDVersion: [ 2, 1 ], amd.IsaInfo: { amd.IsaInfoWavefrontSize: 64, amd.IsaInfoLocalMemorySize: 65536, amd.IsaInfoEUsPerCU: 4, amd.IsaInfoMaxWavesPerEU: 10, amd.IsaInfoMaxFlatWorkGroupSize: 2048, amd.IsaInfoSGPRAllocGranule: 8, amd.IsaInfoTotalNumSGPRs: 512, amd.IsaInfoAddressableNumSGPRs: 104, amd.IsaInfoVGPRAllocGranule: 4, amd.IsaInfoTotalNumVGPRs: 256, amd.IsaInfoAddressableNumVGPRs: 256 }, amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:
|
||||
|
||||
// GFX800: { amd.MDVersion: [ 2, 1 ], amd.IsaInfo: { amd.IsaInfoWavefrontSize: 64, amd.IsaInfoLocalMemorySize: 65536, amd.IsaInfoEUsPerCU: 4, amd.IsaInfoMaxWavesPerEU: 10, amd.IsaInfoMaxFlatWorkGroupSize: 2048, amd.IsaInfoSGPRAllocGranule: 16, amd.IsaInfoTotalNumSGPRs: 800, amd.IsaInfoAddressableNumSGPRs: 96, amd.IsaInfoVGPRAllocGranule: 4, amd.IsaInfoTotalNumVGPRs: 256, amd.IsaInfoAddressableNumVGPRs: 256 }, amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:
|
||||
|
||||
// GFX900: { amd.MDVersion: [ 2, 1 ], amd.IsaInfo: { amd.IsaInfoWavefrontSize: 64, amd.IsaInfoLocalMemorySize: 65536, amd.IsaInfoEUsPerCU: 4, amd.IsaInfoMaxWavesPerEU: 10, amd.IsaInfoMaxFlatWorkGroupSize: 2048, amd.IsaInfoSGPRAllocGranule: 16, amd.IsaInfoTotalNumSGPRs: 800, amd.IsaInfoAddressableNumSGPRs: 102, amd.IsaInfoVGPRAllocGranule: 4, amd.IsaInfoTotalNumVGPRs: 256, amd.IsaInfoAddressableNumVGPRs: 256 }, amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:
|
||||
|
||||
// GCN: - { amd.KernelName: test_char, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:
|
||||
// GCN-NEXT: - { amd.ArgSize: 1, amd.ArgAlign: 1, amd.ArgKind: 0, amd.ArgValueType: 1, amd.ArgTypeName: char, amd.ArgAccQual: 0 }
|
||||
// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }
|
||||
// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }
|
||||
// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }
|
||||
// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }
|
||||
// GCN-NEXT: - { amd.KernelName: test_ushort2, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:
|
||||
// GCN-NEXT: - { amd.ArgSize: 4, amd.ArgAlign: 4, amd.ArgKind: 0, amd.ArgValueType: 4, amd.ArgTypeName: ushort2, amd.ArgAccQual: 0 }
|
||||
// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }
|
||||
// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }
|
||||
// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }
|
||||
// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } } }
|
||||
106
test/MC/AMDGPU/runtime-metadata-invalid-1.s
Normal file
106
test/MC/AMDGPU/runtime-metadata-invalid-1.s
Normal file
@ -0,0 +1,106 @@
|
||||
; RUN: not llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx700 %s 2>&1 | FileCheck %s
|
||||
; RUN: not llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx700 -filetype=obj %s 2>&1 | FileCheck %s
|
||||
; RUN: not llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx800 %s 2>&1 | FileCheck %s
|
||||
; RUN: not llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx800 -filetype=obj %s 2>&1 | FileCheck %s
|
||||
; RUN: not llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx900 %s 2>&1 | FileCheck %s
|
||||
; RUN: not llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx900 -filetype=obj %s 2>&1 | FileCheck %s
|
||||
|
||||
; CHECK: error: unknown key 'amd.RandomUnknownKey'
|
||||
|
||||
.text
|
||||
.hsa_code_object_version 2,1
|
||||
.hsa_code_object_isa 8,0,3,"AMD","AMDGPU"
|
||||
.amdgpu_runtime_metadata
|
||||
---
|
||||
{ amd.MDVersion: [ 2, 1 ], amd.RandomUnknownKey, amd.IsaInfo: { amd.IsaInfoWavefrontSize: 64, amd.IsaInfoLocalMemorySize: 65536, amd.IsaInfoEUsPerCU: 4, amd.IsaInfoMaxWavesPerEU: 10, amd.IsaInfoMaxFlatWorkGroupSize: 2048, amd.IsaInfoSGPRAllocGranule: 16, amd.IsaInfoTotalNumSGPRs: 800, amd.IsaInfoAddressableNumSGPRs: 102, amd.IsaInfoVGPRAllocGranule: 4, amd.IsaInfoTotalNumVGPRs: 256, amd.IsaInfoAddressableNumVGPRs: 256 }, amd.Kernels:
|
||||
- { amd.KernelName: test, amd.Language: OpenCL C, amd.LanguageVersion: [ 1, 0 ], amd.Args:
|
||||
- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 1, amd.ArgValueType: 6, amd.ArgTypeName: 'int*', amd.ArgAddrQual: 1, amd.ArgAccQual: 0 }
|
||||
- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }
|
||||
- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }
|
||||
- { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 } } }
|
||||
...
|
||||
|
||||
.end_amdgpu_runtime_metadata
|
||||
.globl test
|
||||
.p2align 8
|
||||
.type test,@function
|
||||
.amdgpu_hsa_kernel test
|
||||
test: ; @test
|
||||
.amd_kernel_code_t
|
||||
amd_code_version_major = 1
|
||||
amd_code_version_minor = 0
|
||||
amd_machine_kind = 1
|
||||
amd_machine_version_major = 8
|
||||
amd_machine_version_minor = 0
|
||||
amd_machine_version_stepping = 3
|
||||
kernel_code_entry_byte_offset = 256
|
||||
kernel_code_prefetch_byte_size = 0
|
||||
max_scratch_backing_memory_byte_size = 0
|
||||
granulated_workitem_vgpr_count = 0
|
||||
granulated_wavefront_sgpr_count = 0
|
||||
priority = 0
|
||||
float_mode = 192
|
||||
priv = 0
|
||||
enable_dx10_clamp = 1
|
||||
debug_mode = 0
|
||||
enable_ieee_mode = 1
|
||||
enable_sgpr_private_segment_wave_byte_offset = 0
|
||||
user_sgpr_count = 6
|
||||
enable_trap_handler = 1
|
||||
enable_sgpr_workgroup_id_x = 1
|
||||
enable_sgpr_workgroup_id_y = 0
|
||||
enable_sgpr_workgroup_id_z = 0
|
||||
enable_sgpr_workgroup_info = 0
|
||||
enable_vgpr_workitem_id = 0
|
||||
enable_exception_msb = 0
|
||||
granulated_lds_size = 0
|
||||
enable_exception = 0
|
||||
enable_sgpr_private_segment_buffer = 1
|
||||
enable_sgpr_dispatch_ptr = 0
|
||||
enable_sgpr_queue_ptr = 0
|
||||
enable_sgpr_kernarg_segment_ptr = 1
|
||||
enable_sgpr_dispatch_id = 0
|
||||
enable_sgpr_flat_scratch_init = 0
|
||||
enable_sgpr_private_segment_size = 0
|
||||
enable_sgpr_grid_workgroup_count_x = 0
|
||||
enable_sgpr_grid_workgroup_count_y = 0
|
||||
enable_sgpr_grid_workgroup_count_z = 0
|
||||
enable_ordered_append_gds = 0
|
||||
private_element_size = 1
|
||||
is_ptr64 = 1
|
||||
is_dynamic_callstack = 0
|
||||
is_debug_enabled = 0
|
||||
is_xnack_enabled = 0
|
||||
workitem_private_segment_byte_size = 0
|
||||
workgroup_group_segment_byte_size = 0
|
||||
gds_segment_byte_size = 0
|
||||
kernarg_segment_byte_size = 8
|
||||
workgroup_fbarrier_count = 0
|
||||
wavefront_sgpr_count = 6
|
||||
workitem_vgpr_count = 3
|
||||
reserved_vgpr_first = 0
|
||||
reserved_vgpr_count = 0
|
||||
reserved_sgpr_first = 0
|
||||
reserved_sgpr_count = 0
|
||||
debug_wavefront_private_segment_offset_sgpr = 0
|
||||
debug_private_segment_buffer_sgpr = 0
|
||||
kernarg_segment_alignment = 4
|
||||
group_segment_alignment = 4
|
||||
private_segment_alignment = 4
|
||||
wavefront_size = 6
|
||||
call_convention = -1
|
||||
runtime_loader_kernel_symbol = 0
|
||||
.end_amd_kernel_code_t
|
||||
; BB#0: ; %entry
|
||||
s_load_dwordx2 s[0:1], s[4:5], 0x0
|
||||
v_mov_b32_e32 v2, 0x309
|
||||
s_waitcnt lgkmcnt(0)
|
||||
v_mov_b32_e32 v0, s0
|
||||
v_mov_b32_e32 v1, s1
|
||||
flat_store_dword v[0:1], v2
|
||||
s_endpgm
|
||||
.Lfunc_end0:
|
||||
.size test, .Lfunc_end0-test
|
||||
|
||||
.ident ""
|
||||
.section ".note.GNU-stack"
|
||||
Loading…
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Reference in New Issue
Block a user