mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-12-24 12:36:30 +00:00
Expand unaligned i16 loads/stores for the Mips backend.
This is the first of a series of patches which make changes to the backend to emit unaligned load/store instructions (lwl,lwr,swl,swr) during instruction selection. llvm-svn: 157862
This commit is contained in:
parent
72d95cef06
commit
23e92c0ddb
@ -292,7 +292,6 @@ bool MipsTargetLowering::allowsUnalignedMemoryAccesses(EVT VT) const {
|
||||
switch (SVT) {
|
||||
case MVT::i64:
|
||||
case MVT::i32:
|
||||
case MVT::i16:
|
||||
return true;
|
||||
case MVT::f32:
|
||||
return Subtarget->hasMips32r2Or64();
|
||||
|
Loading…
Reference in New Issue
Block a user