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Loads are not two-address in any way
llvm-svn: 76033
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@ -78,29 +78,28 @@ def FNEG64rr : Pseudo<(outs FP64:$dst), (ins FP64:$src),
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"lcdbr\t{$dst, $src}",
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[(set FP64:$dst, (fneg FP64:$src)),
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(implicit PSW)]>;
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}
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let isTwoAddress = 1 in {
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let Defs = [PSW] in {
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def FABS32rr : Pseudo<(outs FP32:$dst), (ins FP32:$src),
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"lpebr\t{$dst}",
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"lpebr\t{$dst, $src}",
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[(set FP32:$dst, (fabs FP32:$src)),
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(implicit PSW)]>;
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def FABS64rr : Pseudo<(outs FP64:$dst), (ins FP64:$src),
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"lpdbr\t{$dst}",
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"lpdbr\t{$dst, $src}",
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[(set FP64:$dst, (fabs FP64:$src)),
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(implicit PSW)]>;
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def FNABS32rr : Pseudo<(outs FP32:$dst), (ins FP32:$src),
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"lnebr\t{$dst}",
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"lnebr\t{$dst, $src}",
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[(set FP32:$dst, (fneg(fabs FP32:$src))),
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(implicit PSW)]>;
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def FNABS64rr : Pseudo<(outs FP64:$dst), (ins FP64:$src),
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"lndbr\t{$dst}",
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"lndbr\t{$dst, $src}",
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[(set FP64:$dst, (fneg(fabs FP64:$src))),
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(implicit PSW)]>;
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}
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let isTwoAddress = 1 in {
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let Defs = [PSW] in {
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let isCommutable = 1 in { // X = ADD Y, Z == X = ADD Z, Y
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def FADD32rr : Pseudo<(outs FP32:$dst), (ins FP32:$src1, FP32:$src2),
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"aebr\t{$dst, $src2}",
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