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Elimate handling of ZERO_EXTEND_INREG. This causes the PPC backend to emit

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andi instructions instead of rlwinm instructions for zero extend, but they
seem like they would take the same time.

llvm-svn: 21268
This commit is contained in:
Chris Lattner 2005-04-13 02:40:26 +00:00
parent f25fefd9cf
commit 26c7c9150a
2 changed files with 0 additions and 25 deletions
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13
lib/Target/PowerPC/PPC32ISelPattern.cpp
View File

@ -1636,19 +1636,6 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) {
}
return Result;
case ISD::ZERO_EXTEND_INREG:
Tmp1 = SelectExpr(N.getOperand(0));
switch(cast<MVTSDNode>(Node)->getExtraValueType()) {
default: Node->dump(); assert(0 && "Unhandled ZERO_EXTEND type"); break;
case MVT::i16: Tmp2 = 16; break;
case MVT::i8: Tmp2 = 24; break;
case MVT::i1: Tmp2 = 31; break;
}
Opc = Recording ? PPC::RLWINMo : PPC::RLWINM;
RecordSuccess = true;
BuildMI(BB, Opc, 4, Result).addReg(Tmp1).addImm(0).addImm(Tmp2).addImm(31);
return Result;
case ISD::CopyFromReg:
if (Result == 1)
Result = ExprMap[N.getValue(0)] = MakeReg(N.getValue(0).getValueType());

12
lib/Target/PowerPC/PPC64ISelPattern.cpp
View File

@ -1154,18 +1154,6 @@ unsigned ISel::SelectExpr(SDOperand N) {
}
return Result;
case ISD::ZERO_EXTEND_INREG:
Tmp1 = SelectExpr(N.getOperand(0));
switch(cast<MVTSDNode>(Node)->getExtraValueType()) {
default: Node->dump(); assert(0 && "Unhandled ZERO_EXTEND type"); break;
case MVT::i16: Tmp2 = 16; break;
case MVT::i8: Tmp2 = 24; break;
case MVT::i1: Tmp2 = 31; break;
}
BuildMI(BB, PPC::RLWINM, 4, Result).addReg(Tmp1).addImm(0).addImm(Tmp2)
.addImm(31);
return Result;
case ISD::CopyFromReg:
if (Result == 1)
Result = ExprMap[N.getValue(0)] = MakeReg(N.getValue(0).getValueType());