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OutputArg: added an index of the original argument to match the change to
InputArg in r165616. This will enable us to get the actual type for both InputArg and OutputArg. rdar://9932559 llvm-svn: 167265
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@ -140,9 +140,19 @@ namespace ISD {
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/// IsFixed - Is this a "fixed" value, ie not passed through a vararg "...".
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bool IsFixed;
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/// Index original Function's argument.
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unsigned OrigArgIndex;
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/// Offset in bytes of current output value relative to the beginning of
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/// original argument. E.g. if argument was splitted into four 32 bit
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/// registers, we got 4 OutputArgs with PartOffsets 0, 4, 8 and 12.
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unsigned PartOffset;
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OutputArg() : IsFixed(false) {}
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OutputArg(ArgFlagsTy flags, EVT vt, bool isfixed)
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: Flags(flags), IsFixed(isfixed) {
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OutputArg(ArgFlagsTy flags, EVT vt, bool isfixed,
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unsigned origIdx, unsigned partOffs)
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: Flags(flags), IsFixed(isfixed), OrigArgIndex(origIdx),
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PartOffset(partOffs) {
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VT = vt.getSimpleVT();
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}
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};
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@ -1255,7 +1255,7 @@ void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
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for (unsigned i = 0; i < NumParts; ++i) {
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Outs.push_back(ISD::OutputArg(Flags, Parts[i].getValueType(),
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/*isfixed=*/true));
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/*isfixed=*/true, 0, 0));
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OutVals.push_back(Parts[i]);
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}
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}
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@ -6540,7 +6540,8 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
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for (unsigned j = 0; j != NumParts; ++j) {
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// if it isn't first piece, alignment must be 1
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ISD::OutputArg MyFlags(Flags, Parts[j].getValueType(),
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i < CLI.NumFixedArgs);
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i < CLI.NumFixedArgs,
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i, j*Parts[j].getValueType().getStoreSize());
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if (NumParts > 1 && j == 0)
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MyFlags.Flags.setSplit();
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else if (j != 0)
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@ -1032,7 +1032,7 @@ void llvm::GetReturnInfo(Type* ReturnType, Attributes attr,
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Flags.setZExt();
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for (unsigned i = 0; i < NumParts; ++i)
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Outs.push_back(ISD::OutputArg(Flags, PartVT, /*isFixed=*/true));
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Outs.push_back(ISD::OutputArg(Flags, PartVT, /*isFixed=*/true, 0, 0));
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}
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}
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