RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-12-12 05:56:28 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

OutputArg: added an index of the original argument to match the change to

Browse Source 
InputArg in r165616.

This will enable us to get the actual type for both InputArg and OutputArg.

rdar://9932559

llvm-svn: 167265
This commit is contained in:
Manman Ren 2012-11-01 23:49:58 +00:00
parent 1037cb0026
commit 2742bb0f84
3 changed files with 16 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
include/llvm/Target/TargetCallingConv.h
View File

@ -140,9 +140,19 @@ namespace ISD {
/// IsFixed - Is this a "fixed" value, ie not passed through a vararg "...". /// IsFixed - Is this a "fixed" value, ie not passed through a vararg "...".
bool IsFixed; bool IsFixed;
/// Index original Function's argument.
unsigned OrigArgIndex;
/// Offset in bytes of current output value relative to the beginning of
/// original argument. E.g. if argument was splitted into four 32 bit
/// registers, we got 4 OutputArgs with PartOffsets 0, 4, 8 and 12.
unsigned PartOffset;
OutputArg() : IsFixed(false) {} OutputArg() : IsFixed(false) {}
OutputArg(ArgFlagsTy flags, EVT vt, bool isfixed) OutputArg(ArgFlagsTy flags, EVT vt, bool isfixed,
: Flags(flags), IsFixed(isfixed) { unsigned origIdx, unsigned partOffs)
: Flags(flags), IsFixed(isfixed), OrigArgIndex(origIdx),
PartOffset(partOffs) {
VT = vt.getSimpleVT(); VT = vt.getSimpleVT();
} }
}; };

5
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
View File

@ -1255,7 +1255,7 @@ void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
for (unsigned i = 0; i < NumParts; ++i) { for (unsigned i = 0; i < NumParts; ++i) {
Outs.push_back(ISD::OutputArg(Flags, Parts[i].getValueType(), Outs.push_back(ISD::OutputArg(Flags, Parts[i].getValueType(),
/*isfixed=*/true)); /*isfixed=*/true, 0, 0));
OutVals.push_back(Parts[i]); OutVals.push_back(Parts[i]);
} }
} }
@ -6540,7 +6540,8 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
for (unsigned j = 0; j != NumParts; ++j) { for (unsigned j = 0; j != NumParts; ++j) {
// if it isn't first piece, alignment must be 1 // if it isn't first piece, alignment must be 1
ISD::OutputArg MyFlags(Flags, Parts[j].getValueType(), ISD::OutputArg MyFlags(Flags, Parts[j].getValueType(),
i < CLI.NumFixedArgs); i < CLI.NumFixedArgs,
i, j*Parts[j].getValueType().getStoreSize());
if (NumParts > 1 && j == 0) if (NumParts > 1 && j == 0)
MyFlags.Flags.setSplit(); MyFlags.Flags.setSplit();
else if (j != 0) else if (j != 0)

2
lib/CodeGen/SelectionDAG/TargetLowering.cpp
View File

@ -1032,7 +1032,7 @@ void llvm::GetReturnInfo(Type* ReturnType, Attributes attr,
Flags.setZExt(); Flags.setZExt();
for (unsigned i = 0; i < NumParts; ++i) for (unsigned i = 0; i < NumParts; ++i)
Outs.push_back(ISD::OutputArg(Flags, PartVT, /*isFixed=*/true)); Outs.push_back(ISD::OutputArg(Flags, PartVT, /*isFixed=*/true, 0, 0));
} }
} }