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Add codegen support for NEON vst4 intrinsics with <1 x i64> vectors.

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llvm-svn: 83526
This commit is contained in:
Bob Wilson 2009-10-08 05:18:18 +00:00
parent 337e15f9a7
commit 276bdabb9a
4 changed files with 15 additions and 0 deletions
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1
lib/Target/ARM/ARMISelDAGToDAG.cpp
View File

@ -1681,6 +1681,7 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) {
case MVT::v4i16: Opc = ARM::VST4d16; break;
case MVT::v2f32:
case MVT::v2i32: Opc = ARM::VST4d32; break;
case MVT::v1i64: Opc = ARM::VST4d64; break;
}
SDValue Chain = N->getOperand(0);
const SDValue Ops[] = { MemAddr, MemUpdate, MemOpc,

4
lib/Target/ARM/ARMInstrNEON.td
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@ -406,6 +406,10 @@ class VST4WB<bits<4> op7_4, string OpcodeStr>
def VST4d8 : VST4D<0b0000, "vst4.8">;
def VST4d16 : VST4D<0b0100, "vst4.16">;
def VST4d32 : VST4D<0b1000, "vst4.32">;
def VST4d64 : NLdSt<0,0b00,0b0010,0b1100, (outs),
(ins addrmode6:$addr, DPR:$src1, DPR:$src2, DPR:$src3,
DPR:$src4), IIC_VST,
"vst1.64\t\\{$src1,$src2,$src3,$src4\\}, $addr", "", []>;
// vst4 to double-spaced even registers.
def VST4q8a : VST4WB<0b0000, "vst4.8">;

1
lib/Target/ARM/NEONPreAllocPass.cpp
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@ -172,6 +172,7 @@ static bool isNEONMultiRegOp(int Opcode, unsigned &FirstOpnd, unsigned &NumRegs,
case ARM::VST4d8:
case ARM::VST4d16:
case ARM::VST4d32:
case ARM::VST4d64:
case ARM::VST4LNd8:
case ARM::VST4LNd16:
case ARM::VST4LNd32:

9
test/CodeGen/ARM/vst4.ll
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@ -32,6 +32,14 @@ define void @vst4f(float* %A, <2 x float>* %B) nounwind {
ret void
}
define void @vst4i64(i64* %A, <1 x i64>* %B) nounwind {
;CHECK: vst4i64:
;CHECK: vst1.64
%tmp1 = load <1 x i64>* %B
call void @llvm.arm.neon.vst4.v1i64(i64* %A, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1)
ret void
}
define void @vst4Qi8(i8* %A, <16 x i8>* %B) nounwind {
;CHECK: vst4Qi8:
;CHECK: vst4.8
@ -72,6 +80,7 @@ declare void @llvm.arm.neon.vst4.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8
declare void @llvm.arm.neon.vst4.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>) nounwind
declare void @llvm.arm.neon.vst4.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>) nounwind
declare void @llvm.arm.neon.vst4.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, <2 x float>) nounwind
declare void @llvm.arm.neon.vst4.v1i64(i8*, <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64>) nounwind
declare void @llvm.arm.neon.vst4.v16i8(i8*, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>) nounwind
declare void @llvm.arm.neon.vst4.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>) nounwind