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Special constants as destinations does not work as expected - drop the patterns.
llvm-svn: 78191
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1c03c3e158
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@ -722,59 +722,6 @@ def CMP16im : Pseudo<(outs), (ins i16imm:$src1, memsrc:$src2),
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"cmp.w\t{$src1, $src2}",
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[(MSP430cmp (i16 imm:$src1), (load addr:$src2)), (implicit SRW)]>;
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// FIXME: imm is allowed only on src operand, not on dst.
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//def CMP8ri : Pseudo<(outs), (ins GR8:$src1, i8imm:$src2),
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// "cmp.b\t{$src1, $src2}",
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// [(MSP430cmp GR8:$src1, imm:$src2), (implicit SRW)]>;
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//def CMP16ri : Pseudo<(outs), (ins GR16:$src1, i16imm:$src2),
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// "cmp.w\t{$src1, $src2}",
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// [(MSP430cmp GR16:$src1, imm:$src2), (implicit SRW)]>;
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//def CMP8mi : Pseudo<(outs), (ins memsrc:$src1, i8imm:$src2),
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// "cmp.b\t{$src1, $src2}",
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// [(MSP430cmp (load addr:$src1), (i8 imm:$src2)), (implicit SRW)]>;
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//def CMP16mi : Pseudo<(outs), (ins memsrc:$src1, i16imm:$src2),
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// "cmp.w\t{$src1, $src2}",
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// [(MSP430cmp (load addr:$src1), (i16 imm:$src2)), (implicit SRW)]>;
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// Imm 0, +1, +2, +4, +8 are encoded via constant generator registers.
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// That's why we can use them as dest operands.
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// We don't define new class for them, since they would need special encoding
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// in the future.
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def CMP8ri0 : Pseudo<(outs), (ins GR8:$src1),
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"cmp.b\t{$src1, #0}",
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[(MSP430cmp GR8:$src1, 0), (implicit SRW)]>;
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def CMP16ri0: Pseudo<(outs), (ins GR16:$src1),
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"cmp.w\t{$src1, #0}",
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[(MSP430cmp GR16:$src1, 0), (implicit SRW)]>;
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def CMP8ri1 : Pseudo<(outs), (ins GR8:$src1),
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"cmp.b\t{$src1, #1}",
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[(MSP430cmp GR8:$src1, 1), (implicit SRW)]>;
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def CMP16ri1: Pseudo<(outs), (ins GR16:$src1),
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"cmp.w\t{$src1, #1}",
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[(MSP430cmp GR16:$src1, 1), (implicit SRW)]>;
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def CMP8ri2 : Pseudo<(outs), (ins GR8:$src1),
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"cmp.b\t{$src1, #2}",
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[(MSP430cmp GR8:$src1, 2), (implicit SRW)]>;
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def CMP16ri2: Pseudo<(outs), (ins GR16:$src1),
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"cmp.w\t{$src1, #2}",
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[(MSP430cmp GR16:$src1, 2), (implicit SRW)]>;
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def CMP8ri4 : Pseudo<(outs), (ins GR8:$src1),
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"cmp.b\t{$src1, #4}",
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[(MSP430cmp GR8:$src1, 4), (implicit SRW)]>;
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def CMP16ri4: Pseudo<(outs), (ins GR16:$src1),
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"cmp.w\t{$src1, #4}",
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[(MSP430cmp GR16:$src1, 4), (implicit SRW)]>;
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def CMP8ri8 : Pseudo<(outs), (ins GR8:$src1),
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"cmp.b\t{$src1, #8}",
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[(MSP430cmp GR8:$src1, 8), (implicit SRW)]>;
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def CMP16ri8: Pseudo<(outs), (ins GR16:$src1),
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"cmp.w\t{$src1, #8}",
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[(MSP430cmp GR16:$src1, 8), (implicit SRW)]>;
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def CMP8rm : Pseudo<(outs), (ins GR8:$src1, memsrc:$src2),
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"cmp.b\t{$src1, $src2}",
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[(MSP430cmp GR8:$src1, (load addr:$src2)), (implicit SRW)]>;
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