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Allow binop C1, (select cc, CF, CT) -> select folding
Previously this folding was done only if select is a first operand. However, for non-commutative operations constant may go before select. Differential Revision: https://reviews.llvm.org/D48223 llvm-svn: 335167
This commit is contained in:
Stanislav Mekhanoshin
parent
438d4eaadd
commit
2b3f1384f5
@ -1877,16 +1877,16 @@ SDValue DAGCombiner::foldBinOpIntoSelect(SDNode *BO) {
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BinOpcode == ISD::FDIV || BinOpcode == ISD::FREM) &&
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"Unexpected binary operator");
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// Bail out if any constants are opaque because we can't constant fold those.
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SDValue C1 = BO->getOperand(1);
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if (!isConstantOrConstantVector(C1, true) &&
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!isConstantFPBuildVectorOrConstantFP(C1))
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return SDValue();
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// Don't do this unless the old select is going away. We want to eliminate the
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// binary operator, not replace a binop with a select.
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// TODO: Handle ISD::SELECT_CC.
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unsigned SelOpNo = 0;
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SDValue Sel = BO->getOperand(0);
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if (Sel.getOpcode() != ISD::SELECT || !Sel.hasOneUse()) {
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SelOpNo = 1;
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Sel = BO->getOperand(1);
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}
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if (Sel.getOpcode() != ISD::SELECT || !Sel.hasOneUse())
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return SDValue();
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@ -1900,18 +1900,36 @@ SDValue DAGCombiner::foldBinOpIntoSelect(SDNode *BO) {
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!isConstantFPBuildVectorOrConstantFP(CF))
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return SDValue();
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// Bail out if any constants are opaque because we can't constant fold those.
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SDValue CBO = BO->getOperand(SelOpNo ^ 1);
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if (!isConstantOrConstantVector(CBO, true) &&
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!isConstantFPBuildVectorOrConstantFP(CBO))
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return SDValue();
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EVT VT = Sel.getValueType();
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// In case of shift value and shift amount may have different VT. For instance
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// on x86 shift amount is i8 regardles of LHS type. Bail out if we have
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// swapped operands and value types do not match. NB: x86 is fine if operands
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// are not swapped with shift amount VT being not bigger than shifted value.
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// TODO: that is possible to check for a shift operation, correct VTs and
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// still perform optimization on x86 if needed.
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if (SelOpNo && VT != CBO.getValueType())
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return SDValue();
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// We have a select-of-constants followed by a binary operator with a
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// constant. Eliminate the binop by pulling the constant math into the select.
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// Example: add (select Cond, CT, CF), C1 --> select Cond, CT + C1, CF + C1
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EVT VT = Sel.getValueType();
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// Example: add (select Cond, CT, CF), CBO --> select Cond, CT + CBO, CF + CBO
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SDLoc DL(Sel);
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SDValue NewCT = DAG.getNode(BinOpcode, DL, VT, CT, C1);
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SDValue NewCT = SelOpNo ? DAG.getNode(BinOpcode, DL, VT, CBO, CT)
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: DAG.getNode(BinOpcode, DL, VT, CT, CBO);
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if (!NewCT.isUndef() &&
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!isConstantOrConstantVector(NewCT, true) &&
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!isConstantFPBuildVectorOrConstantFP(NewCT))
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return SDValue();
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SDValue NewCF = DAG.getNode(BinOpcode, DL, VT, CF, C1);
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SDValue NewCF = SelOpNo ? DAG.getNode(BinOpcode, DL, VT, CBO, CF)
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: DAG.getNode(BinOpcode, DL, VT, CF, CBO);
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if (!NewCF.isUndef() &&
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!isConstantOrConstantVector(NewCF, true) &&
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!isConstantFPBuildVectorOrConstantFP(NewCF))
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182
test/CodeGen/AMDGPU/dagcombine-select.ll
Normal file
182
test/CodeGen/AMDGPU/dagcombine-select.ll
Normal file
@ -0,0 +1,182 @@
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; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
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; GCN-LABEL: {{^}}sel_constants_sub_constant_sel_constants:
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; GCN: v_cndmask_b32_e64 v{{[0-9]+}}, 2, 9,
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define amdgpu_kernel void @sel_constants_sub_constant_sel_constants(i32 addrspace(1)* %p, i1 %cond) {
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%sel = select i1 %cond, i32 -4, i32 3
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%bo = sub i32 5, %sel
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store i32 %bo, i32 addrspace(1)* %p, align 4
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ret void
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}
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; GCN-LABEL: {{^}}sel_constants_sub_constant_sel_constants_i16:
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; TODO: shrink i16 constant. This is correct but suboptimal.
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; GCN: v_mov_b32_e32 [[T:v[0-9]+]], 0xffff0009
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; GCN: v_cndmask_b32_e32 v{{[0-9]+}}, 2, [[T]],
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define amdgpu_kernel void @sel_constants_sub_constant_sel_constants_i16(i16 addrspace(1)* %p, i1 %cond) {
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%sel = select i1 %cond, i16 -4, i16 3
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%bo = sub i16 5, %sel
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store i16 %bo, i16 addrspace(1)* %p, align 2
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ret void
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}
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; GCN-LABEL: {{^}}sel_constants_sub_constant_sel_constants_i16_neg:
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; GCN: v_mov_b32_e32 [[F:v[0-9]+]], 0xfffff449
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; GCN: v_cndmask_b32_e64 v{{[0-9]+}}, [[F]], -3,
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define amdgpu_kernel void @sel_constants_sub_constant_sel_constants_i16_neg(i16 addrspace(1)* %p, i1 %cond) {
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%sel = select i1 %cond, i16 4, i16 3000
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%bo = sub i16 1, %sel
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store i16 %bo, i16 addrspace(1)* %p, align 2
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ret void
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}
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; GCN-LABEL: {{^}}sel_constants_sub_constant_sel_constants_v2i16:
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; GCN-DAG: v_mov_b32_e32 [[F:v[0-9]+]], 0x60002
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; GCN-DAG: v_mov_b32_e32 [[T:v[0-9]+]], 0x50009
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; GCN: v_cndmask_b32_e32 v{{[0-9]+}}, [[F]], [[T]],
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define amdgpu_kernel void @sel_constants_sub_constant_sel_constants_v2i16(<2 x i16> addrspace(1)* %p, i1 %cond) {
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%sel = select i1 %cond, <2 x i16> <i16 -4, i16 2>, <2 x i16> <i16 3, i16 1>
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%bo = sub <2 x i16> <i16 5, i16 7>, %sel
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store <2 x i16> %bo, <2 x i16> addrspace(1)* %p, align 4
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ret void
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}
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; GCN-LABEL: {{^}}sel_constants_sub_constant_sel_constants_v4i32:
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; GCN-DAG: v_cndmask_b32_e64 v{{[0-9]+}}, 2, 9,
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; GCN-DAG: v_cndmask_b32_e64 v{{[0-9]+}}, 6, 5,
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; GCN-DAG: v_cndmask_b32_e64 v{{[0-9]+}}, 10, 6,
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; GCN-DAG: v_cndmask_b32_e64 v{{[0-9]+}}, 14, 7,
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define amdgpu_kernel void @sel_constants_sub_constant_sel_constants_v4i32(<4 x i32> addrspace(1)* %p, i1 %cond) {
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%sel = select i1 %cond, <4 x i32> <i32 -4, i32 2, i32 3, i32 4>, <4 x i32> <i32 3, i32 1, i32 -1, i32 -3>
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%bo = sub <4 x i32> <i32 5, i32 7, i32 9, i32 11>, %sel
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store <4 x i32> %bo, <4 x i32> addrspace(1)* %p, align 32
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ret void
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}
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; GCN-LABEL: {{^}}sdiv_constant_sel_constants:
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; GCN: v_cndmask_b32_e64 v{{[0-9]+}}, 5, 0,
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define amdgpu_kernel void @sdiv_constant_sel_constants(i32 addrspace(1)* %p, i1 %cond) {
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%sel = select i1 %cond, i32 121, i32 23
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%bo = sdiv i32 120, %sel
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store i32 %bo, i32 addrspace(1)* %p, align 4
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ret void
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}
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; GCN-LABEL: {{^}}udiv_constant_sel_constants:
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; GCN: v_cndmask_b32_e64 v{{[0-9]+}}, 5, 0,
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define amdgpu_kernel void @udiv_constant_sel_constants(i32 addrspace(1)* %p, i1 %cond) {
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%sel = select i1 %cond, i32 -4, i32 23
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%bo = udiv i32 120, %sel
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store i32 %bo, i32 addrspace(1)* %p, align 4
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ret void
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}
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; GCN-LABEL: {{^}}srem_constant_sel_constants:
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; GCN: v_cndmask_b32_e64 v{{[0-9]+}}, 3, 33,
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define amdgpu_kernel void @srem_constant_sel_constants(i32 addrspace(1)* %p, i1 %cond) {
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%sel = select i1 %cond, i32 34, i32 15
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%bo = srem i32 33, %sel
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store i32 %bo, i32 addrspace(1)* %p, align 4
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ret void
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}
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; GCN-LABEL: {{^}}urem_constant_sel_constants:
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; GCN: v_cndmask_b32_e64 v{{[0-9]+}}, 3, 33,
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define amdgpu_kernel void @urem_constant_sel_constants(i32 addrspace(1)* %p, i1 %cond) {
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%sel = select i1 %cond, i32 34, i32 15
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%bo = urem i32 33, %sel
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store i32 %bo, i32 addrspace(1)* %p, align 4
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ret void
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}
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; GCN-LABEL: {{^}}shl_constant_sel_constants:
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; GCN: v_cndmask_b32_e64 v{{[0-9]+}}, 8, 4,
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define amdgpu_kernel void @shl_constant_sel_constants(i32 addrspace(1)* %p, i1 %cond) {
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%sel = select i1 %cond, i32 2, i32 3
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%bo = shl i32 1, %sel
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store i32 %bo, i32 addrspace(1)* %p, align 4
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ret void
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}
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; GCN-LABEL: {{^}}lshr_constant_sel_constants:
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; GCN: v_cndmask_b32_e64 v{{[0-9]+}}, 8, 16,
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define amdgpu_kernel void @lshr_constant_sel_constants(i32 addrspace(1)* %p, i1 %cond) {
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%sel = select i1 %cond, i32 2, i32 3
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%bo = lshr i32 64, %sel
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store i32 %bo, i32 addrspace(1)* %p, align 4
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ret void
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}
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; GCN-LABEL: {{^}}ashr_constant_sel_constants:
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; GCN: v_cndmask_b32_e64 v{{[0-9]+}}, 16, 32,
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define amdgpu_kernel void @ashr_constant_sel_constants(i32 addrspace(1)* %p, i1 %cond) {
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%sel = select i1 %cond, i32 2, i32 3
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%bo = ashr i32 128, %sel
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store i32 %bo, i32 addrspace(1)* %p, align 4
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ret void
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}
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; GCN-LABEL: {{^}}fsub_constant_sel_constants:
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; GCN: v_cndmask_b32_e64 v{{[0-9]+}}, -4.0, 1.0,
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define amdgpu_kernel void @fsub_constant_sel_constants(float addrspace(1)* %p, i1 %cond) {
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%sel = select i1 %cond, float -2.0, float 3.0
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%bo = fsub float -1.0, %sel
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store float %bo, float addrspace(1)* %p, align 4
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ret void
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}
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; GCN-LABEL: {{^}}fsub_constant_sel_constants_f16:
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; TODO: it shall be possible to fold constants with OpSel
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; GCN-DAG: v_mov_b32_e32 [[T:v[0-9]+]], 0x3c00
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; GCN-DAG: v_mov_b32_e32 [[F:v[0-9]+]], 0xc400
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; GCN: v_cndmask_b32_e32 v{{[0-9]+}}, [[F]], [[T]],
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define amdgpu_kernel void @fsub_constant_sel_constants_f16(half addrspace(1)* %p, i1 %cond) {
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%sel = select i1 %cond, half -2.0, half 3.0
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%bo = fsub half -1.0, %sel
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store half %bo, half addrspace(1)* %p, align 2
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ret void
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}
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; GCN-LABEL: {{^}}fsub_constant_sel_constants_v2f16:
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; GCN-DAG: v_mov_b32_e32 [[T:v[0-9]+]], 0x45003c00
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; GCN: v_cndmask_b32_e32 v{{[0-9]+}}, -2.0, [[T]],
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define amdgpu_kernel void @fsub_constant_sel_constants_v2f16(<2 x half> addrspace(1)* %p, i1 %cond) {
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%sel = select i1 %cond, <2 x half> <half -2.0, half -3.0>, <2 x half> <half -1.0, half 4.0>
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%bo = fsub <2 x half> <half -1.0, half 2.0>, %sel
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store <2 x half> %bo, <2 x half> addrspace(1)* %p, align 4
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ret void
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}
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; GCN-LABEL: {{^}}fsub_constant_sel_constants_v4f32:
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; GCN-DAG: v_mov_b32_e32 [[T2:v[0-9]+]], 0x40a00000
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; GCN-DAG: v_mov_b32_e32 [[T3:v[0-9]+]], 0x41100000
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; GCN-DAG: v_mov_b32_e32 [[T4:v[0-9]+]], 0x41500000
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; GCN-DAG: v_mov_b32_e32 [[F4:v[0-9]+]], 0x40c00000
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; GCN-DAG: v_cndmask_b32_e64 v{{[0-9]+}}, 0, 1.0,
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; GCN-DAG: v_cndmask_b32_e32 v{{[0-9]+}}, 2.0, [[T2]],
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; GCN-DAG: v_cndmask_b32_e32 v{{[0-9]+}}, 4.0, [[T3]],
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; GCN-DAG: v_cndmask_b32_e32 v{{[0-9]+}}, [[F4]], [[T4]],
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define amdgpu_kernel void @fsub_constant_sel_constants_v4f32(<4 x float> addrspace(1)* %p, i1 %cond) {
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%sel = select i1 %cond, <4 x float> <float -2.0, float -3.0, float -4.0, float -5.0>, <4 x float> <float -1.0, float 0.0, float 1.0, float 2.0>
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%bo = fsub <4 x float> <float -1.0, float 2.0, float 5.0, float 8.0>, %sel
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store <4 x float> %bo, <4 x float> addrspace(1)* %p, align 32
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ret void
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}
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; GCN-LABEL: {{^}}fdiv_constant_sel_constants:
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; GCN: v_cndmask_b32_e64 v{{[0-9]+}}, 4.0, -2.0,
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define amdgpu_kernel void @fdiv_constant_sel_constants(float addrspace(1)* %p, i1 %cond) {
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%sel = select i1 %cond, float -4.0, float 2.0
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%bo = fdiv float 8.0, %sel
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store float %bo, float addrspace(1)* %p, align 4
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ret void
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}
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; GCN-LABEL: {{^}}frem_constant_sel_constants:
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; GCN: v_cndmask_b32_e64 v{{[0-9]+}}, 2.0, 1.0,
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define amdgpu_kernel void @frem_constant_sel_constants(float addrspace(1)* %p, i1 %cond) {
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%sel = select i1 %cond, float -4.0, float 3.0
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%bo = frem float 5.0, %sel
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store float %bo, float addrspace(1)* %p, align 4
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ret void
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}
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@ -404,23 +404,20 @@ define i8 @sel_constants_sub_constant_sel_constants(i1 %cond) {
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; ISEL-LABEL: sel_constants_sub_constant_sel_constants:
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; ISEL: # %bb.0:
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; ISEL-NEXT: andi. 3, 3, 1
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; ISEL-NEXT: li 4, -4
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; ISEL-NEXT: li 3, 3
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; ISEL-NEXT: li 4, 9
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; ISEL-NEXT: li 3, 2
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; ISEL-NEXT: isel 3, 4, 3, 1
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; ISEL-NEXT: subfic 3, 3, 5
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; ISEL-NEXT: blr
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;
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; NO_ISEL-LABEL: sel_constants_sub_constant_sel_constants:
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; NO_ISEL: # %bb.0:
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; NO_ISEL-NEXT: andi. 3, 3, 1
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; NO_ISEL-NEXT: li 4, -4
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; NO_ISEL-NEXT: li 3, 3
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; NO_ISEL-NEXT: li 4, 9
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; NO_ISEL-NEXT: li 3, 2
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; NO_ISEL-NEXT: bc 12, 1, .LBB23_1
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; NO_ISEL-NEXT: b .LBB23_2
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; NO_ISEL-NEXT: blr
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; NO_ISEL-NEXT: .LBB23_1:
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; NO_ISEL-NEXT: addi 3, 4, 0
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; NO_ISEL-NEXT: .LBB23_2:
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; NO_ISEL-NEXT: subfic 3, 3, 5
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; NO_ISEL-NEXT: blr
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%sel = select i1 %cond, i8 -4, i8 3
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%bo = sub i8 5, %sel
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@ -480,25 +477,18 @@ define i8 @sdiv_constant_sel_constants(i1 %cond) {
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; ISEL-LABEL: sdiv_constant_sel_constants:
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; ISEL: # %bb.0:
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; ISEL-NEXT: andi. 3, 3, 1
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; ISEL-NEXT: li 4, 121
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; ISEL-NEXT: li 12, 120
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; ISEL-NEXT: li 3, 23
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; ISEL-NEXT: isel 3, 4, 3, 1
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; ISEL-NEXT: divwu 3, 12, 3
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; ISEL-NEXT: li 3, 5
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; ISEL-NEXT: isel 3, 0, 3, 1
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; ISEL-NEXT: blr
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;
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; NO_ISEL-LABEL: sdiv_constant_sel_constants:
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; NO_ISEL: # %bb.0:
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; NO_ISEL-NEXT: andi. 3, 3, 1
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; NO_ISEL-NEXT: li 4, 121
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; NO_ISEL-NEXT: li 12, 120
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; NO_ISEL-NEXT: li 3, 23
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; NO_ISEL-NEXT: li 3, 5
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; NO_ISEL-NEXT: bc 12, 1, .LBB26_1
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; NO_ISEL-NEXT: b .LBB26_2
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; NO_ISEL-NEXT: blr
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; NO_ISEL-NEXT: .LBB26_1:
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; NO_ISEL-NEXT: addi 3, 4, 0
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; NO_ISEL-NEXT: .LBB26_2:
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; NO_ISEL-NEXT: divwu 3, 12, 3
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; NO_ISEL-NEXT: addi 3, 0, 0
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; NO_ISEL-NEXT: blr
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%sel = select i1 %cond, i8 121, i8 23
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%bo = sdiv i8 120, %sel
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@ -533,25 +523,18 @@ define i8 @udiv_constant_sel_constants(i1 %cond) {
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; ISEL-LABEL: udiv_constant_sel_constants:
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; ISEL: # %bb.0:
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; ISEL-NEXT: andi. 3, 3, 1
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; ISEL-NEXT: li 4, 252
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; ISEL-NEXT: li 12, 120
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; ISEL-NEXT: li 3, 23
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; ISEL-NEXT: isel 3, 4, 3, 1
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; ISEL-NEXT: divwu 3, 12, 3
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; ISEL-NEXT: li 3, 5
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; ISEL-NEXT: isel 3, 0, 3, 1
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; ISEL-NEXT: blr
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;
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; NO_ISEL-LABEL: udiv_constant_sel_constants:
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; NO_ISEL: # %bb.0:
|
||||
; NO_ISEL-NEXT: andi. 3, 3, 1
|
||||
; NO_ISEL-NEXT: li 4, 252
|
||||
; NO_ISEL-NEXT: li 12, 120
|
||||
; NO_ISEL-NEXT: li 3, 23
|
||||
; NO_ISEL-NEXT: li 3, 5
|
||||
; NO_ISEL-NEXT: bc 12, 1, .LBB28_1
|
||||
; NO_ISEL-NEXT: b .LBB28_2
|
||||
; NO_ISEL-NEXT: blr
|
||||
; NO_ISEL-NEXT: .LBB28_1:
|
||||
; NO_ISEL-NEXT: addi 3, 4, 0
|
||||
; NO_ISEL-NEXT: .LBB28_2:
|
||||
; NO_ISEL-NEXT: divwu 3, 12, 3
|
||||
; NO_ISEL-NEXT: addi 3, 0, 0
|
||||
; NO_ISEL-NEXT: blr
|
||||
%sel = select i1 %cond, i8 -4, i8 23
|
||||
%bo = udiv i8 120, %sel
|
||||
@ -589,29 +572,20 @@ define i8 @srem_constant_sel_constants(i1 %cond) {
|
||||
; ISEL-LABEL: srem_constant_sel_constants:
|
||||
; ISEL: # %bb.0:
|
||||
; ISEL-NEXT: andi. 3, 3, 1
|
||||
; ISEL-NEXT: li 4, 121
|
||||
; ISEL-NEXT: li 12, 120
|
||||
; ISEL-NEXT: li 3, 23
|
||||
; ISEL-NEXT: li 4, 120
|
||||
; ISEL-NEXT: li 3, 5
|
||||
; ISEL-NEXT: isel 3, 4, 3, 1
|
||||
; ISEL-NEXT: divwu 4, 12, 3
|
||||
; ISEL-NEXT: mullw 3, 4, 3
|
||||
; ISEL-NEXT: subfic 3, 3, 120
|
||||
; ISEL-NEXT: blr
|
||||
;
|
||||
; NO_ISEL-LABEL: srem_constant_sel_constants:
|
||||
; NO_ISEL: # %bb.0:
|
||||
; NO_ISEL-NEXT: andi. 3, 3, 1
|
||||
; NO_ISEL-NEXT: li 4, 121
|
||||
; NO_ISEL-NEXT: li 12, 120
|
||||
; NO_ISEL-NEXT: li 3, 23
|
||||
; NO_ISEL-NEXT: li 4, 120
|
||||
; NO_ISEL-NEXT: li 3, 5
|
||||
; NO_ISEL-NEXT: bc 12, 1, .LBB30_1
|
||||
; NO_ISEL-NEXT: b .LBB30_2
|
||||
; NO_ISEL-NEXT: blr
|
||||
; NO_ISEL-NEXT: .LBB30_1:
|
||||
; NO_ISEL-NEXT: addi 3, 4, 0
|
||||
; NO_ISEL-NEXT: .LBB30_2:
|
||||
; NO_ISEL-NEXT: divwu 4, 12, 3
|
||||
; NO_ISEL-NEXT: mullw 3, 4, 3
|
||||
; NO_ISEL-NEXT: subfic 3, 3, 120
|
||||
; NO_ISEL-NEXT: blr
|
||||
%sel = select i1 %cond, i8 121, i8 23
|
||||
%bo = srem i8 120, %sel
|
||||
@ -633,29 +607,20 @@ define i8 @urem_constant_sel_constants(i1 %cond) {
|
||||
; ISEL-LABEL: urem_constant_sel_constants:
|
||||
; ISEL: # %bb.0:
|
||||
; ISEL-NEXT: andi. 3, 3, 1
|
||||
; ISEL-NEXT: li 4, 252
|
||||
; ISEL-NEXT: li 12, 120
|
||||
; ISEL-NEXT: li 3, 23
|
||||
; ISEL-NEXT: li 4, 120
|
||||
; ISEL-NEXT: li 3, 5
|
||||
; ISEL-NEXT: isel 3, 4, 3, 1
|
||||
; ISEL-NEXT: divwu 4, 12, 3
|
||||
; ISEL-NEXT: mullw 3, 4, 3
|
||||
; ISEL-NEXT: subfic 3, 3, 120
|
||||
; ISEL-NEXT: blr
|
||||
;
|
||||
; NO_ISEL-LABEL: urem_constant_sel_constants:
|
||||
; NO_ISEL: # %bb.0:
|
||||
; NO_ISEL-NEXT: andi. 3, 3, 1
|
||||
; NO_ISEL-NEXT: li 4, 252
|
||||
; NO_ISEL-NEXT: li 12, 120
|
||||
; NO_ISEL-NEXT: li 3, 23
|
||||
; NO_ISEL-NEXT: li 4, 120
|
||||
; NO_ISEL-NEXT: li 3, 5
|
||||
; NO_ISEL-NEXT: bc 12, 1, .LBB32_1
|
||||
; NO_ISEL-NEXT: b .LBB32_2
|
||||
; NO_ISEL-NEXT: blr
|
||||
; NO_ISEL-NEXT: .LBB32_1:
|
||||
; NO_ISEL-NEXT: addi 3, 4, 0
|
||||
; NO_ISEL-NEXT: .LBB32_2:
|
||||
; NO_ISEL-NEXT: divwu 4, 12, 3
|
||||
; NO_ISEL-NEXT: mullw 3, 4, 3
|
||||
; NO_ISEL-NEXT: subfic 3, 3, 120
|
||||
; NO_ISEL-NEXT: blr
|
||||
%sel = select i1 %cond, i8 -4, i8 23
|
||||
%bo = urem i8 120, %sel
|
||||
@ -897,25 +862,31 @@ define double @sel_constants_fsub_constant(i1 %cond) {
|
||||
}
|
||||
|
||||
define double @fsub_constant_sel_constants(i1 %cond) {
|
||||
; ALL-LABEL: fsub_constant_sel_constants:
|
||||
; ALL: # %bb.0:
|
||||
; ALL-NEXT: andi. 3, 3, 1
|
||||
; ALL-NEXT: bc 12, 1, .LBB44_2
|
||||
; ALL-NEXT: # %bb.1:
|
||||
; ALL-NEXT: addis 3, 2, .LCPI44_0@toc@ha
|
||||
; ALL-NEXT: addi 3, 3, .LCPI44_0@toc@l
|
||||
; ALL-NEXT: lfdx 0, 0, 3
|
||||
; ALL-NEXT: b .LBB44_3
|
||||
; ALL-NEXT: .LBB44_2:
|
||||
; ALL-NEXT: addis 3, 2, .LCPI44_1@toc@ha
|
||||
; ALL-NEXT: addi 3, 3, .LCPI44_1@toc@l
|
||||
; ALL-NEXT: lfsx 0, 0, 3
|
||||
; ALL-NEXT: .LBB44_3:
|
||||
; ALL-NEXT: addis 3, 2, .LCPI44_2@toc@ha
|
||||
; ALL-NEXT: addi 3, 3, .LCPI44_2@toc@l
|
||||
; ALL-NEXT: lfdx 1, 0, 3
|
||||
; ALL-NEXT: xssubdp 1, 1, 0
|
||||
; ALL-NEXT: blr
|
||||
; ISEL-LABEL: fsub_constant_sel_constants:
|
||||
; ISEL: # %bb.0:
|
||||
; ISEL-NEXT: andi. 3, 3, 1
|
||||
; ISEL-NEXT: addis 4, 2, .LCPI44_0@toc@ha
|
||||
; ISEL-NEXT: addis 3, 2, .LCPI44_1@toc@ha
|
||||
; ISEL-NEXT: addi 4, 4, .LCPI44_0@toc@l
|
||||
; ISEL-NEXT: addi 3, 3, .LCPI44_1@toc@l
|
||||
; ISEL-NEXT: isel 3, 3, 4, 1
|
||||
; ISEL-NEXT: lfdx 1, 0, 3
|
||||
; ISEL-NEXT: blr
|
||||
;
|
||||
; NO_ISEL-LABEL: fsub_constant_sel_constants:
|
||||
; NO_ISEL: # %bb.0:
|
||||
; NO_ISEL-NEXT: andi. 3, 3, 1
|
||||
; NO_ISEL-NEXT: addis 4, 2, .LCPI44_0@toc@ha
|
||||
; NO_ISEL-NEXT: addis 3, 2, .LCPI44_1@toc@ha
|
||||
; NO_ISEL-NEXT: addi 4, 4, .LCPI44_0@toc@l
|
||||
; NO_ISEL-NEXT: addi 3, 3, .LCPI44_1@toc@l
|
||||
; NO_ISEL-NEXT: bc 12, 1, .LBB44_2
|
||||
; NO_ISEL-NEXT: # %bb.1:
|
||||
; NO_ISEL-NEXT: ori 3, 4, 0
|
||||
; NO_ISEL-NEXT: b .LBB44_2
|
||||
; NO_ISEL-NEXT: .LBB44_2:
|
||||
; NO_ISEL-NEXT: lfdx 1, 0, 3
|
||||
; NO_ISEL-NEXT: blr
|
||||
%sel = select i1 %cond, double -4.0, double 23.3
|
||||
%bo = fsub double 5.1, %sel
|
||||
ret double %bo
|
||||
@ -984,25 +955,31 @@ define double @sel_constants_fdiv_constant(i1 %cond) {
|
||||
}
|
||||
|
||||
define double @fdiv_constant_sel_constants(i1 %cond) {
|
||||
; ALL-LABEL: fdiv_constant_sel_constants:
|
||||
; ALL: # %bb.0:
|
||||
; ALL-NEXT: andi. 3, 3, 1
|
||||
; ALL-NEXT: bc 12, 1, .LBB47_2
|
||||
; ALL-NEXT: # %bb.1:
|
||||
; ALL-NEXT: addis 3, 2, .LCPI47_0@toc@ha
|
||||
; ALL-NEXT: addi 3, 3, .LCPI47_0@toc@l
|
||||
; ALL-NEXT: lfdx 0, 0, 3
|
||||
; ALL-NEXT: b .LBB47_3
|
||||
; ALL-NEXT: .LBB47_2:
|
||||
; ALL-NEXT: addis 3, 2, .LCPI47_1@toc@ha
|
||||
; ALL-NEXT: addi 3, 3, .LCPI47_1@toc@l
|
||||
; ALL-NEXT: lfsx 0, 0, 3
|
||||
; ALL-NEXT: .LBB47_3:
|
||||
; ALL-NEXT: addis 3, 2, .LCPI47_2@toc@ha
|
||||
; ALL-NEXT: addi 3, 3, .LCPI47_2@toc@l
|
||||
; ALL-NEXT: lfdx 1, 0, 3
|
||||
; ALL-NEXT: xsdivdp 1, 1, 0
|
||||
; ALL-NEXT: blr
|
||||
; ISEL-LABEL: fdiv_constant_sel_constants:
|
||||
; ISEL: # %bb.0:
|
||||
; ISEL-NEXT: andi. 3, 3, 1
|
||||
; ISEL-NEXT: addis 4, 2, .LCPI47_0@toc@ha
|
||||
; ISEL-NEXT: addis 3, 2, .LCPI47_1@toc@ha
|
||||
; ISEL-NEXT: addi 4, 4, .LCPI47_0@toc@l
|
||||
; ISEL-NEXT: addi 3, 3, .LCPI47_1@toc@l
|
||||
; ISEL-NEXT: isel 3, 3, 4, 1
|
||||
; ISEL-NEXT: lfdx 1, 0, 3
|
||||
; ISEL-NEXT: blr
|
||||
;
|
||||
; NO_ISEL-LABEL: fdiv_constant_sel_constants:
|
||||
; NO_ISEL: # %bb.0:
|
||||
; NO_ISEL-NEXT: andi. 3, 3, 1
|
||||
; NO_ISEL-NEXT: addis 4, 2, .LCPI47_0@toc@ha
|
||||
; NO_ISEL-NEXT: addis 3, 2, .LCPI47_1@toc@ha
|
||||
; NO_ISEL-NEXT: addi 4, 4, .LCPI47_0@toc@l
|
||||
; NO_ISEL-NEXT: addi 3, 3, .LCPI47_1@toc@l
|
||||
; NO_ISEL-NEXT: bc 12, 1, .LBB47_2
|
||||
; NO_ISEL-NEXT: # %bb.1:
|
||||
; NO_ISEL-NEXT: ori 3, 4, 0
|
||||
; NO_ISEL-NEXT: b .LBB47_2
|
||||
; NO_ISEL-NEXT: .LBB47_2:
|
||||
; NO_ISEL-NEXT: lfdx 1, 0, 3
|
||||
; NO_ISEL-NEXT: blr
|
||||
%sel = select i1 %cond, double -4.0, double 23.3
|
||||
%bo = fdiv double 5.1, %sel
|
||||
ret double %bo
|
||||
@ -1029,34 +1006,31 @@ define double @sel_constants_frem_constant(i1 %cond) {
|
||||
}
|
||||
|
||||
define double @frem_constant_sel_constants(i1 %cond) {
|
||||
; ALL-LABEL: frem_constant_sel_constants:
|
||||
; ALL: # %bb.0:
|
||||
; ALL-NEXT: mflr 0
|
||||
; ALL-NEXT: std 0, 16(1)
|
||||
; ALL-NEXT: stdu 1, -32(1)
|
||||
; ALL-NEXT: .cfi_def_cfa_offset 32
|
||||
; ALL-NEXT: .cfi_offset lr, 16
|
||||
; ALL-NEXT: andi. 3, 3, 1
|
||||
; ALL-NEXT: bc 12, 1, .LBB49_2
|
||||
; ALL-NEXT: # %bb.1:
|
||||
; ALL-NEXT: addis 3, 2, .LCPI49_0@toc@ha
|
||||
; ALL-NEXT: addi 3, 3, .LCPI49_0@toc@l
|
||||
; ALL-NEXT: lfdx 2, 0, 3
|
||||
; ALL-NEXT: b .LBB49_3
|
||||
; ALL-NEXT: .LBB49_2:
|
||||
; ALL-NEXT: addis 3, 2, .LCPI49_1@toc@ha
|
||||
; ALL-NEXT: addi 3, 3, .LCPI49_1@toc@l
|
||||
; ALL-NEXT: lfsx 2, 0, 3
|
||||
; ALL-NEXT: .LBB49_3:
|
||||
; ALL-NEXT: addis 3, 2, .LCPI49_2@toc@ha
|
||||
; ALL-NEXT: addi 3, 3, .LCPI49_2@toc@l
|
||||
; ALL-NEXT: lfdx 1, 0, 3
|
||||
; ALL-NEXT: bl fmod
|
||||
; ALL-NEXT: nop
|
||||
; ALL-NEXT: addi 1, 1, 32
|
||||
; ALL-NEXT: ld 0, 16(1)
|
||||
; ALL-NEXT: mtlr 0
|
||||
; ALL-NEXT: blr
|
||||
; ISEL-LABEL: frem_constant_sel_constants:
|
||||
; ISEL: # %bb.0:
|
||||
; ISEL-NEXT: andi. 3, 3, 1
|
||||
; ISEL-NEXT: addis 4, 2, .LCPI49_0@toc@ha
|
||||
; ISEL-NEXT: addis 3, 2, .LCPI49_1@toc@ha
|
||||
; ISEL-NEXT: addi 4, 4, .LCPI49_0@toc@l
|
||||
; ISEL-NEXT: addi 3, 3, .LCPI49_1@toc@l
|
||||
; ISEL-NEXT: isel 3, 3, 4, 1
|
||||
; ISEL-NEXT: lfdx 1, 0, 3
|
||||
; ISEL-NEXT: blr
|
||||
;
|
||||
; NO_ISEL-LABEL: frem_constant_sel_constants:
|
||||
; NO_ISEL: # %bb.0:
|
||||
; NO_ISEL-NEXT: andi. 3, 3, 1
|
||||
; NO_ISEL-NEXT: addis 4, 2, .LCPI49_0@toc@ha
|
||||
; NO_ISEL-NEXT: addis 3, 2, .LCPI49_1@toc@ha
|
||||
; NO_ISEL-NEXT: addi 4, 4, .LCPI49_0@toc@l
|
||||
; NO_ISEL-NEXT: addi 3, 3, .LCPI49_1@toc@l
|
||||
; NO_ISEL-NEXT: bc 12, 1, .LBB49_2
|
||||
; NO_ISEL-NEXT: # %bb.1:
|
||||
; NO_ISEL-NEXT: ori 3, 4, 0
|
||||
; NO_ISEL-NEXT: b .LBB49_2
|
||||
; NO_ISEL-NEXT: .LBB49_2:
|
||||
; NO_ISEL-NEXT: lfdx 1, 0, 3
|
||||
; NO_ISEL-NEXT: blr
|
||||
%sel = select i1 %cond, double -4.0, double 23.3
|
||||
%bo = frem double 5.1, %sel
|
||||
ret double %bo
|
||||
|
||||
@ -65,11 +65,9 @@ define i32 @sel_constants_sub_constant_sel_constants(i1 %cond) {
|
||||
; CHECK-LABEL: sel_constants_sub_constant_sel_constants:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: testb $1, %dil
|
||||
; CHECK-NEXT: movl $-4, %eax
|
||||
; CHECK-NEXT: movl $3, %ecx
|
||||
; CHECK-NEXT: cmovnel %eax, %ecx
|
||||
; CHECK-NEXT: movl $5, %eax
|
||||
; CHECK-NEXT: subl %ecx, %eax
|
||||
; CHECK-NEXT: movl $9, %ecx
|
||||
; CHECK-NEXT: movl $2, %eax
|
||||
; CHECK-NEXT: cmovnel %ecx, %eax
|
||||
; CHECK-NEXT: retq
|
||||
%sel = select i1 %cond, i32 -4, i32 3
|
||||
%bo = sub i32 5, %sel
|
||||
@ -79,13 +77,10 @@ define i32 @sel_constants_sub_constant_sel_constants(i1 %cond) {
|
||||
define i32 @sdiv_constant_sel_constants(i1 %cond) {
|
||||
; CHECK-LABEL: sdiv_constant_sel_constants:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: testb $1, %dil
|
||||
; CHECK-NEXT: movl $121, %eax
|
||||
; CHECK-NEXT: movl $23, %ecx
|
||||
; CHECK-NEXT: cmovnel %eax, %ecx
|
||||
; CHECK-NEXT: movl $120, %eax
|
||||
; CHECK-NEXT: xorl %edx, %edx
|
||||
; CHECK-NEXT: divl %ecx
|
||||
; CHECK-NEXT: notb %dil
|
||||
; CHECK-NEXT: movzbl %dil, %eax
|
||||
; CHECK-NEXT: andl $1, %eax
|
||||
; CHECK-NEXT: leal (%rax,%rax,4), %eax
|
||||
; CHECK-NEXT: retq
|
||||
%sel = select i1 %cond, i32 121, i32 23
|
||||
%bo = sdiv i32 120, %sel
|
||||
@ -95,13 +90,10 @@ define i32 @sdiv_constant_sel_constants(i1 %cond) {
|
||||
define i32 @udiv_constant_sel_constants(i1 %cond) {
|
||||
; CHECK-LABEL: udiv_constant_sel_constants:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: testb $1, %dil
|
||||
; CHECK-NEXT: movl $-4, %eax
|
||||
; CHECK-NEXT: movl $23, %ecx
|
||||
; CHECK-NEXT: cmovnel %eax, %ecx
|
||||
; CHECK-NEXT: movl $120, %eax
|
||||
; CHECK-NEXT: xorl %edx, %edx
|
||||
; CHECK-NEXT: divl %ecx
|
||||
; CHECK-NEXT: notb %dil
|
||||
; CHECK-NEXT: movzbl %dil, %eax
|
||||
; CHECK-NEXT: andl $1, %eax
|
||||
; CHECK-NEXT: leal (%rax,%rax,4), %eax
|
||||
; CHECK-NEXT: retq
|
||||
%sel = select i1 %cond, i32 -4, i32 23
|
||||
%bo = udiv i32 120, %sel
|
||||
@ -112,13 +104,9 @@ define i32 @srem_constant_sel_constants(i1 %cond) {
|
||||
; CHECK-LABEL: srem_constant_sel_constants:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: testb $1, %dil
|
||||
; CHECK-NEXT: movl $121, %eax
|
||||
; CHECK-NEXT: movl $23, %ecx
|
||||
; CHECK-NEXT: cmovnel %eax, %ecx
|
||||
; CHECK-NEXT: movl $120, %eax
|
||||
; CHECK-NEXT: xorl %edx, %edx
|
||||
; CHECK-NEXT: divl %ecx
|
||||
; CHECK-NEXT: movl %edx, %eax
|
||||
; CHECK-NEXT: movl $120, %ecx
|
||||
; CHECK-NEXT: movl $5, %eax
|
||||
; CHECK-NEXT: cmovnel %ecx, %eax
|
||||
; CHECK-NEXT: retq
|
||||
%sel = select i1 %cond, i32 121, i32 23
|
||||
%bo = srem i32 120, %sel
|
||||
@ -129,19 +117,29 @@ define i32 @urem_constant_sel_constants(i1 %cond) {
|
||||
; CHECK-LABEL: urem_constant_sel_constants:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: testb $1, %dil
|
||||
; CHECK-NEXT: movl $-4, %eax
|
||||
; CHECK-NEXT: movl $23, %ecx
|
||||
; CHECK-NEXT: cmovnel %eax, %ecx
|
||||
; CHECK-NEXT: movl $120, %eax
|
||||
; CHECK-NEXT: xorl %edx, %edx
|
||||
; CHECK-NEXT: divl %ecx
|
||||
; CHECK-NEXT: movl %edx, %eax
|
||||
; CHECK-NEXT: movl $120, %ecx
|
||||
; CHECK-NEXT: movl $5, %eax
|
||||
; CHECK-NEXT: cmovnel %ecx, %eax
|
||||
; CHECK-NEXT: retq
|
||||
%sel = select i1 %cond, i32 -4, i32 23
|
||||
%bo = urem i32 120, %sel
|
||||
ret i32 %bo
|
||||
}
|
||||
|
||||
define i32 @sel_constants_shl_constant(i1 %cond) {
|
||||
; CHECK-LABEL: sel_constants_shl_constant:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: notb %dil
|
||||
; CHECK-NEXT: movzbl %dil, %eax
|
||||
; CHECK-NEXT: andl $1, %eax
|
||||
; CHECK-NEXT: orl $2, %eax
|
||||
; CHECK-NEXT: shll $8, %eax
|
||||
; CHECK-NEXT: retq
|
||||
%sel = select i1 %cond, i32 2, i32 3
|
||||
%bo = shl i32 %sel, 8
|
||||
ret i32 %bo
|
||||
}
|
||||
|
||||
define i32 @shl_constant_sel_constants(i1 %cond) {
|
||||
; CHECK-LABEL: shl_constant_sel_constants:
|
||||
; CHECK: # %bb.0:
|
||||
@ -188,15 +186,12 @@ define double @fsub_constant_sel_constants(i1 %cond) {
|
||||
; CHECK-LABEL: fsub_constant_sel_constants:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: testb $1, %dil
|
||||
; CHECK-NEXT: jne .LBB12_1
|
||||
; CHECK-NEXT: jne .LBB13_1
|
||||
; CHECK-NEXT: # %bb.2:
|
||||
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
|
||||
; CHECK-NEXT: jmp .LBB12_3
|
||||
; CHECK-NEXT: .LBB12_1:
|
||||
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
|
||||
; CHECK-NEXT: .LBB12_3:
|
||||
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
|
||||
; CHECK-NEXT: subsd %xmm1, %xmm0
|
||||
; CHECK-NEXT: retq
|
||||
; CHECK-NEXT: .LBB13_1:
|
||||
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
|
||||
; CHECK-NEXT: retq
|
||||
%sel = select i1 %cond, double -4.0, double 23.3
|
||||
%bo = fsub double 5.1, %sel
|
||||
@ -207,15 +202,12 @@ define double @fdiv_constant_sel_constants(i1 %cond) {
|
||||
; CHECK-LABEL: fdiv_constant_sel_constants:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: testb $1, %dil
|
||||
; CHECK-NEXT: jne .LBB13_1
|
||||
; CHECK-NEXT: jne .LBB14_1
|
||||
; CHECK-NEXT: # %bb.2:
|
||||
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
|
||||
; CHECK-NEXT: jmp .LBB13_3
|
||||
; CHECK-NEXT: .LBB13_1:
|
||||
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
|
||||
; CHECK-NEXT: .LBB13_3:
|
||||
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
|
||||
; CHECK-NEXT: divsd %xmm1, %xmm0
|
||||
; CHECK-NEXT: retq
|
||||
; CHECK-NEXT: .LBB14_1:
|
||||
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
|
||||
; CHECK-NEXT: retq
|
||||
%sel = select i1 %cond, double -4.0, double 23.3
|
||||
%bo = fdiv double 5.1, %sel
|
||||
@ -226,15 +218,13 @@ define double @frem_constant_sel_constants(i1 %cond) {
|
||||
; CHECK-LABEL: frem_constant_sel_constants:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: testb $1, %dil
|
||||
; CHECK-NEXT: jne .LBB14_1
|
||||
; CHECK-NEXT: jne .LBB15_1
|
||||
; CHECK-NEXT: # %bb.2:
|
||||
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
|
||||
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
|
||||
; CHECK-NEXT: jmp fmod # TAILCALL
|
||||
; CHECK-NEXT: .LBB14_1:
|
||||
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
|
||||
; CHECK-NEXT: retq
|
||||
; CHECK-NEXT: .LBB15_1:
|
||||
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
|
||||
; CHECK-NEXT: jmp fmod # TAILCALL
|
||||
; CHECK-NEXT: retq
|
||||
%sel = select i1 %cond, double -4.0, double 23.3
|
||||
%bo = frem double 5.1, %sel
|
||||
ret double %bo
|
||||
|
||||
Loading…
Reference in New Issue
Block a user