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Basic FP->Int, Int->FP conversions.
llvm-svn: 113523
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49efee5c95
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@ -116,6 +116,8 @@ class ARMFastISel : public FastISel {
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virtual bool ARMSelectCmp(const Instruction *I);
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virtual bool ARMSelectFPExt(const Instruction *I);
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virtual bool ARMSelectBinaryOp(const Instruction *I, unsigned ISDOpcode);
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virtual bool ARMSelectSIToFP(const Instruction *I);
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virtual bool ARMSelectFPToSI(const Instruction *I);
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// Utility routines.
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private:
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@ -741,6 +743,55 @@ bool ARMFastISel::ARMSelectFPExt(const Instruction *I) {
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return true;
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}
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bool ARMFastISel::ARMSelectSIToFP(const Instruction *I) {
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// Make sure we have VFP.
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if (!Subtarget->hasVFP2()) return false;
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EVT VT;
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const Type *Ty = I->getType();
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if (!isTypeLegal(Ty, VT))
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return false;
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unsigned Op = getRegForValue(I->getOperand(0));
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if (Op == 0) return false;
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unsigned Opc;
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if (Ty->isFloatTy()) Opc = ARM::VSITOS;
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else if (Ty->isDoubleTy()) Opc = ARM::VSITOD;
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else return 0;
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unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT));
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AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc),
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ResultReg)
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.addReg(Op));
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return true;
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}
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bool ARMFastISel::ARMSelectFPToSI(const Instruction *I) {
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// Make sure we have VFP.
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if (!Subtarget->hasVFP2()) return false;
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EVT VT;
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const Type *RetTy = I->getType();
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if (!isTypeLegal(RetTy, VT))
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return false;
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unsigned Op = getRegForValue(I->getOperand(0));
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if (Op == 0) return false;
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unsigned Opc;
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const Type *OpTy = I->getOperand(0)->getType();
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if (OpTy->isFloatTy()) Opc = ARM::VTOSIZS;
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else if (OpTy->isDoubleTy()) Opc = ARM::VTOSIZD;
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else return 0;
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unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT));
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AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc),
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ResultReg)
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.addReg(Op));
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return true;
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}
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bool ARMFastISel::ARMSelectBinaryOp(const Instruction *I, unsigned ISDOpcode) {
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EVT VT = TLI.getValueType(I->getType(), true);
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@ -798,6 +849,10 @@ bool ARMFastISel::TargetSelectInstruction(const Instruction *I) {
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return ARMSelectCmp(I);
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case Instruction::FPExt:
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return ARMSelectFPExt(I);
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case Instruction::SIToFP:
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return ARMSelectSIToFP(I);
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case Instruction::FPToSI:
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return ARMSelectFPToSI(I);
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case Instruction::FAdd:
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return ARMSelectBinaryOp(I, ISD::FADD);
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case Instruction::FSub:
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