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minimize test case but still show the bug
llvm-svn: 253940
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88e7e42aae
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@ -2,46 +2,29 @@
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s --check-prefix=SSE
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=AVX
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declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>)
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define i1 @PR25554(<2 x i64> %v0, <2 x i64> %v1) {
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define <2 x i64> @PR25554(<2 x i64> %v0, <2 x i64> %v1) {
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; SSE-LABEL: PR25554:
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; SSE: # BB#0:
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; SSE-NEXT: movl $1, %eax
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; SSE-NEXT: movd %rax, %xmm2
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; SSE-NEXT: ptest %xmm2, %xmm0
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; SSE-NEXT: sete %cl
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; SSE-NEXT: movzbl %cl, %ecx
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; SSE-NEXT: movd %rax, %xmm0
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; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
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; SSE-NEXT: ptest %xmm0, %xmm1
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; SSE-NEXT: sete %al
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; SSE-NEXT: movzbl %al, %eax
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; SSE-NEXT: orl %ecx, %eax
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; SSE-NEXT: sete %al
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; SSE-NEXT: movd %rax, %xmm1
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; SSE-NEXT: por %xmm1, %xmm0
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; SSE-NEXT: movd %rax, %xmm1
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; SSE-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7]
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; SSE-NEXT: paddq %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: PR25554:
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; AVX: # BB#0:
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; AVX-NEXT: movl $1, %eax
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; AVX-NEXT: vmovq %rax, %xmm2
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; AVX-NEXT: vptest %xmm2, %xmm0
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; AVX-NEXT: sete %cl
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; AVX-NEXT: movzbl %cl, %ecx
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; AVX-NEXT: vmovq %rax, %xmm0
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; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
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; AVX-NEXT: vptest %xmm0, %xmm1
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; AVX-NEXT: sete %al
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; AVX-NEXT: movzbl %al, %eax
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; AVX-NEXT: orl %ecx, %eax
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; AVX-NEXT: sete %al
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; AVX-NEXT: vmovq %rax, %xmm1
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; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vmovq %rax, %xmm1
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; AVX-NEXT: vpslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7]
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; AVX-NEXT: vpaddq %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%c1 = tail call i32 @llvm.x86.sse41.ptestz(<2 x i64> %v0, <2 x i64> <i64 1, i64 0>)
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%b1 = icmp eq i32 %c1, 0
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%c2 = tail call i32 @llvm.x86.sse41.ptestz(<2 x i64> %v1, <2 x i64> <i64 0, i64 1>)
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%b2 = icmp eq i32 %c2, 0
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%and = and i1 %b1, %b2
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ret i1 %and
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%c1 = or <2 x i64> %v0, <i64 1, i64 0>
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%c2 = add <2 x i64> %c1, <i64 0, i64 1>
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ret <2 x i64> %c2
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}
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