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Make ARM hint ranges consistent, and add tests for these ranges

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llvm-svn: 193238
This commit is contained in:
Artyom Skrobov 2013-10-23 10:14:40 +00:00
parent 37694f9f85
commit 2ef42e5c31
9 changed files with 60 additions and 10 deletions
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11
lib/Target/ARM/ARMInstrInfo.td
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@ -677,6 +677,15 @@ def imm0_63 : Operand<i32>, ImmLeaf<i32, [{
let ParserMatchClass = Imm0_63AsmOperand;
}
/// imm0_239 predicate - Immediate in the range [0,239].
def Imm0_239AsmOperand : ImmAsmOperand {
let Name = "Imm0_239";
let DiagnosticType = "ImmRange0_239";
}
def imm0_239 : Operand<i32>, ImmLeaf<i32, [{ return Imm >= 0 && Imm < 240; }]> {
let ParserMatchClass = Imm0_239AsmOperand;
}
/// imm0_255 predicate - Immediate in the range [0,255].
def Imm0_255AsmOperand : ImmAsmOperand { let Name = "Imm0_255"; }
def imm0_255 : Operand<i32>, ImmLeaf<i32, [{ return Imm >= 0 && Imm < 256; }]> {
@ -1670,7 +1679,7 @@ PseudoInst<(outs), (ins i32imm:$amt, pred:$p), NoItinerary,
[(ARMcallseq_start timm:$amt)]>;
}
def HINT : AI<(outs), (ins imm0_255:$imm), MiscFrm, NoItinerary,
def HINT : AI<(outs), (ins imm0_239:$imm), MiscFrm, NoItinerary,
"hint", "\t$imm", []>, Requires<[IsARM, HasV6]> {
bits<8> imm;
let Inst{27-8} = 0b00110010000011110000;

1
lib/Target/ARM/ARMInstrThumb.td
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@ -280,7 +280,6 @@ class tHintAlias<string Asm, dag Result> : tInstAlias<Asm, Result> {
let Predicates = [IsThumb, HasV6M];
}
def : tHintAlias<"hint$p $imm", (tHINT imm0_15:$imm, pred:$p)>;
def : tHintAlias<"nop$p", (tHINT 0, pred:$p)>; // A8.6.110
def : tHintAlias<"yield$p", (tHINT 1, pred:$p)>; // A8.6.410
def : tHintAlias<"wfe$p", (tHINT 2, pred:$p)>; // A8.6.408

8
lib/Target/ARM/ARMInstrThumb2.td
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@ -3653,13 +3653,13 @@ def : t2InstAlias<"cps.w $mode", (t2CPS1p imm0_31:$mode), 0>;
// A6.3.4 Branches and miscellaneous control
// Table A6-14 Change Processor State, and hint instructions
def t2HINT : T2I<(outs), (ins imm0_255:$imm), NoItinerary, "hint.w", "\t$imm",[]> {
bits<3> imm;
def t2HINT : T2I<(outs), (ins imm0_239:$imm), NoItinerary, "hint", ".w\t$imm",[]> {
bits<8> imm;
let Inst{31-3} = 0b11110011101011111000000000000;
let Inst{2-0} = imm;
let Inst{7-0} = imm;
}
def : t2InstAlias<"hint$p.w $imm", (t2HINT imm0_255:$imm, pred:$p)>;
def : t2InstAlias<"hint$p $imm", (t2HINT imm0_239:$imm, pred:$p)>;
def : t2InstAlias<"nop$p.w", (t2HINT 0, pred:$p)>;
def : t2InstAlias<"yield$p.w", (t2HINT 1, pred:$p)>;
def : t2InstAlias<"wfe$p.w", (t2HINT 2, pred:$p)>;

12
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
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@ -703,6 +703,13 @@ public:
// explicitly exclude zero. we want that to use the normal 0_508 version.
return ((Value & 3) == 0) && Value > 0 && Value <= 508;
}
bool isImm0_239() const {
if (!isImm()) return false;
const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
if (!CE) return false;
int64_t Value = CE->getValue();
return Value >= 0 && Value < 240;
}
bool isImm0_255() const {
if (!isImm()) return false;
const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
@ -7722,6 +7729,11 @@ MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
if (ErrorLoc == SMLoc()) ErrorLoc = IDLoc;
return Error(ErrorLoc, "immediate operand must be in the range [0,15]");
}
case Match_ImmRange0_239: {
SMLoc ErrorLoc = ((ARMOperand*)Operands[ErrorInfo])->getStartLoc();
if (ErrorLoc == SMLoc()) ErrorLoc = IDLoc;
return Error(ErrorLoc, "immediate operand must be in the range [0,239]");
}
}
llvm_unreachable("Implement any new match types added!");

4
test/MC/ARM/basic-arm-instructions.s
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@ -2928,7 +2928,7 @@ Lforward:
hint #2
hint #1
hint #0
hint #255
hintgt #239
@ CHECK: wfe @ encoding: [0x02,0xf0,0x20,0xe3]
@ CHECK: wfehi @ encoding: [0x02,0xf0,0x20,0x83]
@ -2941,4 +2941,4 @@ Lforward:
@ CHECK: wfe @ encoding: [0x02,0xf0,0x20,0xe3]
@ CHECK: yield @ encoding: [0x01,0xf0,0x20,0xe3]
@ CHECK: nop @ encoding: [0x00,0xf0,0x20,0xe3]
@ CHECK: hint #255 @ encoding: [0xff,0xf0,0x20,0xe3]
@ CHECK: hintgt #239 @ encoding: [0xef,0xf0,0x20,0xc3]

10
test/MC/ARM/basic-thumb2-instructions.s
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@ -3603,6 +3603,11 @@ _func:
hint #1
hint #0
itet lt
hintlt #15
hintge #16
hintlt #239
@ CHECK: wfe @ encoding: [0x20,0xbf]
@ CHECK: wfi @ encoding: [0x30,0xbf]
@ CHECK: yield @ encoding: [0x10,0xbf]
@ -3621,6 +3626,11 @@ _func:
@ CHECK: yield @ encoding: [0x10,0xbf]
@ CHECK: nop @ encoding: [0x00,0xbf]
@ CHECK: itet lt @ encoding: [0xb6,0xbf]
@ CHECK: hintlt #15 @ encoding: [0xf0,0xbf]
@ CHECK: hintge.w #16 @ encoding: [0xaf,0xf3,0x10,0x80]
@ CHECK: hintlt.w #239 @ encoding: [0xaf,0xf3,0xef,0x80]
@------------------------------------------------------------------------------
@ Unallocated wide/narrow hints
@------------------------------------------------------------------------------

8
test/MC/ARM/invalid-hint-arm.s Normal file
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@ -0,0 +1,8 @@
@ RUN: not llvm-mc -triple=armv7-apple-darwin -mcpu=cortex-a8 < %s 2>&1 | FileCheck %s
hint #240
hint #1000
@ CHECK: error: immediate operand must be in the range [0,239]
@ CHECK: error: immediate operand must be in the range [0,239]

8
test/MC/ARM/invalid-hint-thumb.s Normal file
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@ -0,0 +1,8 @@
@ RUN: not llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 < %s 2>&1 | FileCheck %s
hint #240
hint #1000
@ CHECK: error: immediate operand must be in the range [0,239]
@ CHECK: error: immediate operand must be in the range [0,239]

8
test/MC/Disassembler/ARM/thumb2.txt
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@ -2710,7 +2710,11 @@
#------------------------------------------------------------------------------
# Unallocated hints (They execute as NOPs, but software must not use them.)
#------------------------------------------------------------------------------
[0x60 0xbf]
# CHECK: hint #6
# CHECK: hint.w #6
# CHECK: hint.w #102
0x60 0xbf
0xaf 0xf3 0x06 0x80
0xaf 0xf3 0x66 0x80