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Make sure the regs are low regs for tMUL size reduction.
llvm-svn: 151318
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@ -599,7 +599,12 @@ Thumb2SizeReduce::ReduceTo2Addr(MachineBasicBlock &MBB, MachineInstr *MI,
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unsigned Reg1 = MI->getOperand(1).getReg();
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// t2MUL is "special". The tied source operand is second, not first.
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if (MI->getOpcode() == ARM::t2MUL) {
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if (Reg0 != MI->getOperand(2).getReg()) {
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unsigned Reg2 = MI->getOperand(2).getReg();
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// Early exit if the regs aren't all low regs.
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if (!isARMLowRegister(Reg0) || !isARMLowRegister(Reg1)
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|| !isARMLowRegister(Reg2))
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return false;
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if (Reg0 != Reg2) {
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// If the other operand also isn't the same as the destination, we
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// can't reduce.
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if (Reg1 != Reg0)
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