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[AMDGPU][MC] Corrected checks for DS offset0 range

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See bug 40889: https://bugs.llvm.org/show_bug.cgi?id=40889

Reviewers: artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D59313

llvm-svn: 356576
This commit is contained in:
Dmitry Preobrazhensky 2019-03-20 17:13:58 +00:00
parent 39c0da6484
commit 30e86bc12d
2 changed files with 13 additions and 1 deletions
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2
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
View File

@ -306,7 +306,7 @@ public:
bool isIdxen() const { return isImmTy(ImmTyIdxen); }
bool isAddr64() const { return isImmTy(ImmTyAddr64); }
bool isOffset() const { return isImmTy(ImmTyOffset) && isUInt<16>(getImm()); }
bool isOffset0() const { return isImmTy(ImmTyOffset0) && isUInt<16>(getImm()); }
bool isOffset0() const { return isImmTy(ImmTyOffset0) && isUInt<8>(getImm()); }
bool isOffset1() const { return isImmTy(ImmTyOffset1) && isUInt<8>(getImm()); }
bool isOffsetU12() const { return (isImmTy(ImmTyOffset) || isImmTy(ImmTyInstOffset)) && isUInt<12>(getImm()); }

12
test/MC/AMDGPU/ds-err.s
View File

@ -5,6 +5,10 @@
// CHECK: error: invalid operand for instruction
ds_add_u32 v2, v4 offset:1000000000
// offset too big
// CHECK: error: invalid operand for instruction
ds_add_u32 v2, v4 offset:0x10000
// offset0 twice
// CHECK: error: invalid operand for instruction
ds_write2_b32 v2, v4, v6 offset0:4 offset0:8
@ -17,10 +21,18 @@ ds_write2_b32 v2, v4, v6 offset1:4 offset1:8
// CHECK: invalid operand for instruction
ds_write2_b32 v2, v4, v6 offset0:1000000000
// offset0 too big
// CHECK: invalid operand for instruction
ds_write2_b32 v2, v4, v6 offset0:0x100
// offset1 too big
// CHECK: invalid operand for instruction
ds_write2_b32 v2, v4, v6 offset1:1000000000
// offset1 too big
// CHECK: invalid operand for instruction
ds_write2_b32 v2, v4, v6 offset1:0x100
//===----------------------------------------------------------------------===//
// swizzle
//===----------------------------------------------------------------------===//