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Add more AVX2 instructions and intrinsics.
llvm-svn: 143861
This commit is contained in:
Craig Topper
parent
7b09da38b4
commit
31b1d79474
@ -1668,22 +1668,52 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_avx2_pblendw : GCCBuiltin<"__builtin_ia32_pblendw256">,
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Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty, llvm_v16i16_ty,
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llvm_i32_ty], [IntrNoMem]>;
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def int_x86_avx2_pblendd_128 : GCCBuiltin<"__builtin_ia32_pblendd128">,
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Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty,
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llvm_i32_ty], [IntrNoMem]>;
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def int_x86_avx2_pblendd_256 : GCCBuiltin<"__builtin_ia32_pblendd256">,
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Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty, llvm_v8i32_ty,
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llvm_i32_ty], [IntrNoMem]>;
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}
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// Vector load with broadcast
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_avx2_vbroadcast_ss_ps :
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GCCBuiltin<"__builtin_ia32_vbroadcastss_ps">,
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Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty], [IntrReadMem]>;
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GCCBuiltin<"__builtin_ia32_vbroadcastss_ps">,
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Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty], [IntrNoMem]>;
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def int_x86_avx2_vbroadcast_sd_pd_256 :
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GCCBuiltin<"__builtin_ia32_vbroadcastsd_pd256">,
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Intrinsic<[llvm_v4f64_ty], [llvm_v2f64_ty], [IntrReadMem]>;
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GCCBuiltin<"__builtin_ia32_vbroadcastsd_pd256">,
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Intrinsic<[llvm_v4f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
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def int_x86_avx2_vbroadcast_ss_ps_256 :
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GCCBuiltin<"__builtin_ia32_vbroadcastss_ps256">,
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Intrinsic<[llvm_v8f32_ty], [llvm_v4f32_ty], [IntrReadMem]>;
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GCCBuiltin<"__builtin_ia32_vbroadcastss_ps256">,
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Intrinsic<[llvm_v8f32_ty], [llvm_v4f32_ty], [IntrNoMem]>;
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def int_x86_avx2_vbroadcasti128 :
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GCCBuiltin<"__builtin_ia32_vbroadcastsi256">,
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Intrinsic<[llvm_v4i64_ty], [llvm_ptr_ty], [IntrReadMem]>;
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GCCBuiltin<"__builtin_ia32_vbroadcastsi256">,
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Intrinsic<[llvm_v4i64_ty], [llvm_ptr_ty], [IntrReadMem]>;
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def int_x86_avx2_pbroadcastb_128 :
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GCCBuiltin<"__builtin_ia32_pbroadcastb128">,
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Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty], [IntrNoMem]>;
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def int_x86_avx2_pbroadcastb_256 :
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GCCBuiltin<"__builtin_ia32_pbroadcastb256">,
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Intrinsic<[llvm_v32i8_ty], [llvm_v16i8_ty], [IntrNoMem]>;
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def int_x86_avx2_pbroadcastw_128 :
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GCCBuiltin<"__builtin_ia32_pbroadcastw128">,
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Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty], [IntrNoMem]>;
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def int_x86_avx2_pbroadcastw_256 :
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GCCBuiltin<"__builtin_ia32_pbroadcastw256">,
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Intrinsic<[llvm_v16i16_ty], [llvm_v8i16_ty], [IntrNoMem]>;
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def int_x86_avx2_pbroadcastd_128 :
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GCCBuiltin<"__builtin_ia32_pbroadcastd128">,
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Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty], [IntrNoMem]>;
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def int_x86_avx2_pbroadcastd_256 :
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GCCBuiltin<"__builtin_ia32_pbroadcastd256">,
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Intrinsic<[llvm_v8i32_ty], [llvm_v4i32_ty], [IntrNoMem]>;
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def int_x86_avx2_pbroadcastq_128 :
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GCCBuiltin<"__builtin_ia32_pbroadcastq128">,
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Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty], [IntrNoMem]>;
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def int_x86_avx2_pbroadcastq_256 :
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GCCBuiltin<"__builtin_ia32_pbroadcastq256">,
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Intrinsic<[llvm_v4i64_ty], [llvm_v2i64_ty], [IntrNoMem]>;
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}
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// Misc.
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@ -451,6 +451,20 @@ class AVXAIi8<bits<8> o, Format F, dag outs, dag ins, string asm,
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: Ii8<o, F, outs, ins, asm, pattern, SSEPackedInt>, TA, OpSize,
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Requires<[HasAVX]>;
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// AVX2 Instruction Templates:
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// Instructions introduced in AVX2 (no SSE equivalent forms)
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//
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// AVX28I - AVX2 instructions with T8 and OpSize prefix.
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// AVX2AIi8 - AVX2 instructions with TA, OpSize prefix and ImmT = Imm8.
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class AVX28I<bits<8> o, Format F, dag outs, dag ins, string asm,
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list<dag> pattern>
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: I<o, F, outs, ins, asm, pattern, SSEPackedInt>, T8, OpSize,
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Requires<[HasAVX2]>;
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class AVX2Ii8<bits<8> o, Format F, dag outs, dag ins, string asm,
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list<dag> pattern>
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: Ii8<o, F, outs, ins, asm, pattern, SSEPackedInt>, TA, OpSize,
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Requires<[HasAVX2]>;
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// AES Instruction Templates:
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//
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// AES8I
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@ -7083,11 +7083,12 @@ class avx_broadcast<bits<8> opc, string OpcodeStr, RegisterClass RC,
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!strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
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[(set RC:$dst, (Int addr:$src))]>, VEX;
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class avx_broadcast_reg<bits<8> opc, string OpcodeStr, RegisterClass RC,
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Intrinsic Int> :
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AVX8I<opc, MRMSrcReg, (outs RC:$dst), (ins VR128:$src),
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!strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
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[(set RC:$dst, (Int VR128:$src))]>, VEX;
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// AVX2 adds register forms
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class avx2_broadcast_reg<bits<8> opc, string OpcodeStr, RegisterClass RC,
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Intrinsic Int> :
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AVX28I<opc, MRMSrcReg, (outs RC:$dst), (ins VR128:$src),
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!strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
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[(set RC:$dst, (Int VR128:$src))]>, VEX;
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def VBROADCASTSSrm : avx_broadcast<0x18, "vbroadcastss", VR128, f32mem,
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int_x86_avx_vbroadcast_ss>;
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@ -7098,16 +7099,16 @@ def VBROADCASTSDrm : avx_broadcast<0x19, "vbroadcastsd", VR256, f64mem,
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def VBROADCASTF128 : avx_broadcast<0x1A, "vbroadcastf128", VR256, f128mem,
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int_x86_avx_vbroadcastf128_pd_256>;
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let Predicates = [HasAVX2] in {
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def VBROADCASTSSrr : avx2_broadcast_reg<0x18, "vbroadcastss", VR128,
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int_x86_avx2_vbroadcast_ss_ps>;
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def VBROADCASTSSYrr : avx2_broadcast_reg<0x18, "vbroadcastss", VR256,
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int_x86_avx2_vbroadcast_ss_ps_256>;
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def VBROADCASTSDrr : avx2_broadcast_reg<0x19, "vbroadcastsd", VR256,
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int_x86_avx2_vbroadcast_sd_pd_256>;
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let Predicates = [HasAVX2] in
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def VBROADCASTI128 : avx_broadcast<0x5A, "vbroadcasti128", VR256, i128mem,
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int_x86_avx2_vbroadcasti128>;
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def VBROADCASTSSrr : avx_broadcast_reg<0x18, "vbroadcastss", VR128,
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int_x86_avx2_vbroadcast_ss_ps>;
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def VBROADCASTSSYrr : avx_broadcast_reg<0x18, "vbroadcastss", VR256,
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int_x86_avx2_vbroadcast_ss_ps_256>;
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def VBROADCASTSDrr : avx_broadcast_reg<0x19, "vbroadcastsd", VR256,
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int_x86_avx2_vbroadcast_sd_pd_256>;
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}
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def : Pat<(int_x86_avx_vbroadcastf128_ps_256 addr:$src),
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(VBROADCASTF128 addr:$src)>;
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@ -7364,7 +7365,7 @@ let Defs = [YMM0, YMM1, YMM2, YMM3, YMM4, YMM5, YMM6, YMM7,
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//===----------------------------------------------------------------------===//
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// Half precision conversion instructions
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//
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//===----------------------------------------------------------------------===//
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multiclass f16c_ph2ps<RegisterClass RC, X86MemOperand x86memop, Intrinsic Int> {
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let Predicates = [HasAVX, HasF16C] in {
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def rr : I<0x13, MRMSrcReg, (outs RC:$dst), (ins VR128:$src),
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@ -7396,3 +7397,71 @@ defm VCVTPH2PS : f16c_ph2ps<VR128, f64mem, int_x86_vcvtph2ps_128>;
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defm VCVTPH2PSY : f16c_ph2ps<VR256, f128mem, int_x86_vcvtph2ps_256>;
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defm VCVTPS2PH : f16c_ps2ph<VR128, f64mem, int_x86_vcvtps2ph_128>;
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defm VCVTPS2PHY : f16c_ps2ph<VR256, f128mem, int_x86_vcvtps2ph_256>;
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//===----------------------------------------------------------------------===//
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// AVX2 Instructions
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//===----------------------------------------------------------------------===//
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/// AVX2I_binop_rmi_int - AVX2 binary operator with 8-bit immediate
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multiclass AVX2I_binop_rmi_int<bits<8> opc, string OpcodeStr,
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Intrinsic IntId, RegisterClass RC, PatFrag memop_frag,
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X86MemOperand x86memop> {
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let isCommutable = 1 in
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def rri : AVX2Ii8<opc, MRMSrcReg, (outs RC:$dst),
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(ins RC:$src1, RC:$src2, u32u8imm:$src3),
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!strconcat(OpcodeStr,
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"\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
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[(set RC:$dst, (IntId RC:$src1, RC:$src2, imm:$src3))]>,
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VEX_4V;
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def rmi : AVX2Ii8<opc, MRMSrcMem, (outs RC:$dst),
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(ins RC:$src1, x86memop:$src2, u32u8imm:$src3),
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!strconcat(OpcodeStr,
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"\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
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[(set RC:$dst,
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(IntId RC:$src1,
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(bitconvert (memop_frag addr:$src2)), imm:$src3))]>,
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VEX_4V;
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}
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let isCommutable = 0 in {
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defm VPBLENDD : AVX2I_binop_rmi_int<0x02, "vpblendd", int_x86_avx2_pblendd_128,
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VR128, memopv16i8, i128mem>;
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defm VPBLENDDY : AVX2I_binop_rmi_int<0x02, "vpblendd", int_x86_avx2_pblendd_256,
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VR256, memopv32i8, i256mem>;
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}
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//===----------------------------------------------------------------------===//
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// VPBROADCAST - Load from memory and broadcast to all elements of the
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// destination operand
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//
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multiclass avx2_broadcast<bits<8> opc, string OpcodeStr,
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X86MemOperand x86memop, PatFrag ld_frag,
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Intrinsic Int128, Intrinsic Int256> {
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def rr : AVX28I<opc, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
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!strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
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[(set VR128:$dst, (Int128 VR128:$src))]>, VEX;
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def rm : AVX28I<opc, MRMSrcMem, (outs VR128:$dst), (ins x86memop:$src),
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!strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
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[(set VR128:$dst,
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(Int128 (scalar_to_vector (ld_frag addr:$src))))]>, VEX;
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def Yrr : AVX28I<opc, MRMSrcReg, (outs VR256:$dst), (ins VR128:$src),
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!strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
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[(set VR256:$dst, (Int256 VR128:$src))]>, VEX;
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def Yrm : AVX28I<opc, MRMSrcMem, (outs VR256:$dst), (ins x86memop:$src),
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!strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
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[(set VR256:$dst,
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(Int256 (scalar_to_vector (ld_frag addr:$src))))]>, VEX;
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}
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defm VPBROADCASTB : avx2_broadcast<0x78, "vpbroadcastb", i8mem, loadi8,
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int_x86_avx2_pbroadcastb_128,
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int_x86_avx2_pbroadcastb_256>;
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defm VPBROADCASTW : avx2_broadcast<0x79, "vpbroadcastw", i16mem, loadi16,
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int_x86_avx2_pbroadcastw_128,
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int_x86_avx2_pbroadcastw_256>;
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defm VPBROADCASTD : avx2_broadcast<0x58, "vpbroadcastd", i32mem, loadi32,
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int_x86_avx2_pbroadcastd_128,
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int_x86_avx2_pbroadcastd_256>;
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defm VPBROADCASTQ : avx2_broadcast<0x59, "vpbroadcastq", i64mem, loadi64,
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int_x86_avx2_pbroadcastq_128,
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int_x86_avx2_pbroadcastq_256>;
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@ -766,3 +766,83 @@ define <8 x float> @test_x86_avx2_vbroadcast_ss_ps_256(<4 x float> %a0) {
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ret <8 x float> %res
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}
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declare <8 x float> @llvm.x86.avx2.vbroadcast.ss.ps.256(<4 x float>) nounwind readonly
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define <4 x i32> @test_x86_avx2_pblendd_128(<4 x i32> %a0, <4 x i32> %a1) {
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; CHECK: vpblendd
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%res = call <4 x i32> @llvm.x86.avx2.pblendd.128(<4 x i32> %a0, <4 x i32> %a1, i32 7) ; <<4 x i32>> [#uses=1]
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ret <4 x i32> %res
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}
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declare <4 x i32> @llvm.x86.avx2.pblendd.128(<4 x i32>, <4 x i32>, i32) nounwind readnone
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define <8 x i32> @test_x86_avx2_pblendd_256(<8 x i32> %a0, <8 x i32> %a1) {
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; CHECK: vpblendd
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%res = call <8 x i32> @llvm.x86.avx2.pblendd.256(<8 x i32> %a0, <8 x i32> %a1, i32 7) ; <<8 x i32>> [#uses=1]
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ret <8 x i32> %res
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}
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declare <8 x i32> @llvm.x86.avx2.pblendd.256(<8 x i32>, <8 x i32>, i32) nounwind readnone
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define <16 x i8> @test_x86_avx2_pbroadcastb_128(<16 x i8> %a0) {
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; CHECK: vpbroadcastb
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%res = call <16 x i8> @llvm.x86.avx2.pbroadcastb.128(<16 x i8> %a0) ; <<16 x i8>> [#uses=1]
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ret <16 x i8> %res
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}
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declare <16 x i8> @llvm.x86.avx2.pbroadcastb.128(<16 x i8>) nounwind readonly
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define <32 x i8> @test_x86_avx2_pbroadcastb_256(<16 x i8> %a0) {
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; CHECK: vpbroadcastb
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%res = call <32 x i8> @llvm.x86.avx2.pbroadcastb.256(<16 x i8> %a0) ; <<32 x i8>> [#uses=1]
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ret <32 x i8> %res
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}
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declare <32 x i8> @llvm.x86.avx2.pbroadcastb.256(<16 x i8>) nounwind readonly
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define <8 x i16> @test_x86_avx2_pbroadcastw_128(<8 x i16> %a0) {
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; CHECK: vpbroadcastw
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%res = call <8 x i16> @llvm.x86.avx2.pbroadcastw.128(<8 x i16> %a0) ; <<8 x i16>> [#uses=1]
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ret <8 x i16> %res
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}
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declare <8 x i16> @llvm.x86.avx2.pbroadcastw.128(<8 x i16>) nounwind readonly
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define <16 x i16> @test_x86_avx2_pbroadcastw_256(<8 x i16> %a0) {
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; CHECK: vpbroadcastw
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%res = call <16 x i16> @llvm.x86.avx2.pbroadcastw.256(<8 x i16> %a0) ; <<16 x i16>> [#uses=1]
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ret <16 x i16> %res
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}
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declare <16 x i16> @llvm.x86.avx2.pbroadcastw.256(<8 x i16>) nounwind readonly
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define <4 x i32> @test_x86_avx2_pbroadcastd_128(<4 x i32> %a0) {
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; CHECK: vpbroadcastd
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%res = call <4 x i32> @llvm.x86.avx2.pbroadcastd.128(<4 x i32> %a0) ; <<4 x i32>> [#uses=1]
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ret <4 x i32> %res
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}
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declare <4 x i32> @llvm.x86.avx2.pbroadcastd.128(<4 x i32>) nounwind readonly
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define <8 x i32> @test_x86_avx2_pbroadcastd_256(<4 x i32> %a0) {
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; CHECK: vpbroadcastd
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%res = call <8 x i32> @llvm.x86.avx2.pbroadcastd.256(<4 x i32> %a0) ; <<8 x i32>> [#uses=1]
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ret <8 x i32> %res
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}
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declare <8 x i32> @llvm.x86.avx2.pbroadcastd.256(<4 x i32>) nounwind readonly
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define <2 x i64> @test_x86_avx2_pbroadcastq_128(<2 x i64> %a0) {
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; CHECK: vpbroadcastq
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%res = call <2 x i64> @llvm.x86.avx2.pbroadcastq.128(<2 x i64> %a0) ; <<2 x i64>> [#uses=1]
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ret <2 x i64> %res
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}
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declare <2 x i64> @llvm.x86.avx2.pbroadcastq.128(<2 x i64>) nounwind readonly
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define <4 x i64> @test_x86_avx2_pbroadcastq_256(<2 x i64> %a0) {
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; CHECK: vpbroadcastq
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%res = call <4 x i64> @llvm.x86.avx2.pbroadcastq.256(<2 x i64> %a0) ; <<4 x i64>> [#uses=1]
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ret <4 x i64> %res
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}
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declare <4 x i64> @llvm.x86.avx2.pbroadcastq.256(<2 x i64>) nounwind readonly
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