Revert "LivePhysRegs: Skip reserved regs in computeLiveIns; NFCI"

Tentatively revert, suspecting that it caused breakage in stage2
buildbots.

This reverts commit r303949.
This reverts commit r303937.

llvm-svn: 303955
This commit is contained in:
Matthias Braun 2017-05-26 01:29:32 +00:00
parent d1780d1f25
commit 34bf22f6ad
5 changed files with 7 additions and 13 deletions

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@ -163,7 +163,7 @@ inline raw_ostream &operator<<(raw_ostream &OS, const LivePhysRegs& LR) {
/// lists are up-to-date. Uses the given LivePhysReg instance \p LiveRegs; This /// lists are up-to-date. Uses the given LivePhysReg instance \p LiveRegs; This
/// is just here to avoid repeated heap allocations when calling this multiple /// is just here to avoid repeated heap allocations when calling this multiple
/// times in a pass. /// times in a pass.
void computeLiveIns(LivePhysRegs &LiveRegs, const MachineRegisterInfo &MRI, void computeLiveIns(LivePhysRegs &LiveRegs, const TargetRegisterInfo &TRI,
MachineBasicBlock &MBB); MachineBasicBlock &MBB);
} // end namespace llvm } // end namespace llvm

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@ -153,14 +153,13 @@ bool BranchFolder::OptimizeFunction(MachineFunction &MF,
TriedMerging.clear(); TriedMerging.clear();
MachineRegisterInfo &MRI = MF.getRegInfo();
AfterBlockPlacement = AfterPlacement; AfterBlockPlacement = AfterPlacement;
TII = tii; TII = tii;
TRI = tri; TRI = tri;
MMI = mmi; MMI = mmi;
MLI = mli; MLI = mli;
this->MRI = &MRI;
MachineRegisterInfo &MRI = MF.getRegInfo();
UpdateLiveIns = MRI.tracksLiveness() && TRI->trackLivenessAfterRegAlloc(MF); UpdateLiveIns = MRI.tracksLiveness() && TRI->trackLivenessAfterRegAlloc(MF);
if (!UpdateLiveIns) if (!UpdateLiveIns)
MRI.invalidateLiveness(); MRI.invalidateLiveness();
@ -352,7 +351,7 @@ void BranchFolder::ReplaceTailWithBranchTo(MachineBasicBlock::iterator OldInst,
if (UpdateLiveIns) { if (UpdateLiveIns) {
NewDest->clearLiveIns(); NewDest->clearLiveIns();
computeLiveIns(LiveRegs, *MRI, *NewDest); computeLiveIns(LiveRegs, *TRI, *NewDest);
} }
++NumTailMerge; ++NumTailMerge;
@ -389,7 +388,7 @@ MachineBasicBlock *BranchFolder::SplitMBBAt(MachineBasicBlock &CurMBB,
MBBFreqInfo.setBlockFreq(NewMBB, MBBFreqInfo.getBlockFreq(&CurMBB)); MBBFreqInfo.setBlockFreq(NewMBB, MBBFreqInfo.getBlockFreq(&CurMBB));
if (UpdateLiveIns) if (UpdateLiveIns)
computeLiveIns(LiveRegs, *MRI, *NewMBB); computeLiveIns(LiveRegs, *TRI, *NewMBB);
// Add the new block to the funclet. // Add the new block to the funclet.
const auto &FuncletI = FuncletMembership.find(&CurMBB); const auto &FuncletI = FuncletMembership.find(&CurMBB);

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@ -108,7 +108,6 @@ namespace llvm {
bool UpdateLiveIns; bool UpdateLiveIns;
unsigned MinCommonTailLength; unsigned MinCommonTailLength;
const TargetInstrInfo *TII; const TargetInstrInfo *TII;
const MachineRegisterInfo *MRI;
const TargetRegisterInfo *TRI; const TargetRegisterInfo *TRI;
MachineModuleInfo *MMI; MachineModuleInfo *MMI;
MachineLoopInfo *MLI; MachineLoopInfo *MLI;

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@ -259,7 +259,7 @@ MachineBasicBlock *BranchRelaxation::splitBlockBeforeInstr(MachineInstr &MI,
// Need to fix live-in lists if we track liveness. // Need to fix live-in lists if we track liveness.
if (TRI->trackLivenessAfterRegAlloc(*MF)) if (TRI->trackLivenessAfterRegAlloc(*MF))
computeLiveIns(LiveRegs, MF->getRegInfo(), *NewBB); computeLiveIns(LiveRegs, *TRI, *NewBB);
++NumSplit; ++NumSplit;

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@ -214,10 +214,8 @@ void LivePhysRegs::addLiveIns(const MachineBasicBlock &MBB) {
addBlockLiveIns(MBB); addBlockLiveIns(MBB);
} }
void llvm::computeLiveIns(LivePhysRegs &LiveRegs, void llvm::computeLiveIns(LivePhysRegs &LiveRegs, const TargetRegisterInfo &TRI,
const MachineRegisterInfo &MRI,
MachineBasicBlock &MBB) { MachineBasicBlock &MBB) {
const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
assert(MBB.livein_empty()); assert(MBB.livein_empty());
LiveRegs.init(TRI); LiveRegs.init(TRI);
LiveRegs.addLiveOutsNoPristines(MBB); LiveRegs.addLiveOutsNoPristines(MBB);
@ -225,12 +223,10 @@ void llvm::computeLiveIns(LivePhysRegs &LiveRegs,
LiveRegs.stepBackward(MI); LiveRegs.stepBackward(MI);
for (unsigned Reg : LiveRegs) { for (unsigned Reg : LiveRegs) {
if (MRI.isReserved(Reg))
continue;
// Skip the register if we are about to add one of its super registers. // Skip the register if we are about to add one of its super registers.
bool ContainsSuperReg = false; bool ContainsSuperReg = false;
for (MCSuperRegIterator SReg(Reg, &TRI); SReg.isValid(); ++SReg) { for (MCSuperRegIterator SReg(Reg, &TRI); SReg.isValid(); ++SReg) {
if (LiveRegs.contains(*SReg) && !MRI.isReserved(*SReg)) { if (LiveRegs.contains(*SReg)) {
ContainsSuperReg = true; ContainsSuperReg = true;
break; break;
} }