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[WebAssembly] SIMD sqrt

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Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52387

llvm-svn: 342937
This commit is contained in:
Thomas Lively 2018-09-25 03:39:28 +00:00
parent a3275cd945
commit 3503ba6394
3 changed files with 39 additions and 0 deletions
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9
lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
View File

@ -212,6 +212,12 @@ multiclass SIMDAbs<ValueType vec_t, string vec, bits<32> simdop> {
[(set (vec_t V128:$dst), (vec_t (fabs V128:$vec)))],
vec#".abs\t$dst, $vec", vec#".abs", simdop>;
}
multiclass SIMDSqrt<ValueType vec_t, string vec, bits<32> simdop> {
defm SQRT_#vec_t :
SIMD_I<(outs V128:$dst), (ins V128:$vec), (outs), (ins),
[(set (vec_t V128:$dst), (vec_t (fsqrt V128:$vec)))],
vec#".sqrt\t$dst, $vec", vec#".sqrt", simdop>;
}
let Defs = [ARGUMENTS] in {
defm "" : ConstVec<v16i8,
@ -371,6 +377,9 @@ defm GE : SIMDConditionFP<"ge", SETOGE, 123>;
defm "" : SIMDAbs<v4f32, "f32x4", 127>;
defm "" : SIMDAbs<v2f64, "f64x2", 128>;
defm "" : SIMDSqrt<v4f32, "f32x4", 141>;
defm "" : SIMDSqrt<v2f64, "f64x2", 142>;
} // Defs = [ARGUMENTS]
// Def load and store patterns from WebAssemblyInstrMemory.td for vector types

24
test/CodeGen/WebAssembly/simd-arith.ll
View File

@ -723,6 +723,18 @@ define <4 x float> @mul_v4f32(<4 x float> %x, <4 x float> %y) {
ret <4 x float> %a
}
; CHECK-LABEL: sqrt_v4f32:
; NO-SIMD128-NOT: f32x4
; SIMD128-NEXT: .param v128{{$}}
; SIMD128-NEXT: .result v128{{$}}
; SIMD128-NEXT: f32x4.sqrt $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <4 x float> @llvm.sqrt.v4f32(<4 x float> %x)
define <4 x float> @sqrt_v4f32(<4 x float> %x) {
%a = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %x)
ret <4 x float> %a
}
; ==============================================================================
; 2 x double
; ==============================================================================
@ -797,3 +809,15 @@ define <2 x double> @mul_v2f64(<2 x double> %x, <2 x double> %y) {
%a = fmul <2 x double> %x, %y
ret <2 x double> %a
}
; CHECK-LABEL: sqrt_v2f64:
; NO-SIMD128-NOT: f64x2
; SIMD128-NEXT: .param v128{{$}}
; SIMD128-NEXT: .result v128{{$}}
; SIMD128-NEXT: f64x2.sqrt $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
declare <2 x double> @llvm.sqrt.v2f64(<2 x double> %x)
define <2 x double> @sqrt_v2f64(<2 x double> %x) {
%a = call <2 x double> @llvm.sqrt.v2f64(<2 x double> %x)
ret <2 x double> %a
}

6
test/MC/WebAssembly/simd-encodings.s
View File

@ -355,4 +355,10 @@
# CHECK: f64x2.mul # encoding: [0xfd,0x8c]
f64x2.mul
# CHECK: f32x4.sqrt # encoding: [0xfd,0x8d]
f32x4.sqrt
# CHECK: f64x2.sqrt # encoding: [0xfd,0x8e]
f64x2.sqrt
end_function