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SLPVectorizer: fix wrong scheduling of atomic load/stores.
This fixes PR22306. llvm-svn: 227077
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@ -309,6 +309,17 @@ static AliasAnalysis::Location getLocation(Instruction *I, AliasAnalysis *AA) {
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return AliasAnalysis::Location();
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return AliasAnalysis::Location();
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}
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}
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/// \returns True if the instruction is not a volatile or atomic load/store.
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static bool isSimple(Instruction *I) {
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if (LoadInst *LI = dyn_cast<LoadInst>(I))
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return LI->isSimple();
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if (StoreInst *SI = dyn_cast<StoreInst>(I))
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return SI->isSimple();
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if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(I))
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return !MI->isVolatile();
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return true;
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}
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/// Bottom Up SLP Vectorizer.
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/// Bottom Up SLP Vectorizer.
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class BoUpSLP {
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class BoUpSLP {
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public:
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public:
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@ -501,7 +512,7 @@ private:
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}
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}
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AliasAnalysis::Location Loc2 = getLocation(Inst2, AA);
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AliasAnalysis::Location Loc2 = getLocation(Inst2, AA);
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bool aliased = true;
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bool aliased = true;
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if (Loc1.Ptr && Loc2.Ptr) {
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if (Loc1.Ptr && Loc2.Ptr && isSimple(Inst1) && isSimple(Inst2)) {
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// Do the alias check.
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// Do the alias check.
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aliased = AA->alias(Loc1, Loc2);
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aliased = AA->alias(Loc1, Loc2);
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}
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}
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31
test/Transforms/SLPVectorizer/X86/atomics.ll
Normal file
31
test/Transforms/SLPVectorizer/X86/atomics.ll
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@ -0,0 +1,31 @@
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; RUN: opt < %s -basicaa -slp-vectorizer -S |FileCheck %s
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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@x = global [4 x i32] zeroinitializer, align 16
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@a = global [4 x i32] zeroinitializer, align 16
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; The SLPVectorizer should not vectorize atomic stores and it should not
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; schedule regular stores around atomic stores.
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; CHECK-LABEL: test
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; CHECK: store i32
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; CHECK: store atomic i32
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; CHECK: store i32
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; CHECK: store atomic i32
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; CHECK: store i32
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; CHECK: store atomic i32
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; CHECK: store i32
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; CHECK: store atomic i32
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define void @test() {
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entry:
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store i32 0, i32* getelementptr inbounds ([4 x i32]* @a, i64 0, i64 0), align 16
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store atomic i32 0, i32* getelementptr inbounds ([4 x i32]* @x, i64 0, i64 0) release, align 16
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store i32 0, i32* getelementptr inbounds ([4 x i32]* @a, i64 0, i64 1), align 4
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store atomic i32 1, i32* getelementptr inbounds ([4 x i32]* @x, i64 0, i64 1) release, align 4
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store i32 0, i32* getelementptr inbounds ([4 x i32]* @a, i64 0, i64 2), align 8
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store atomic i32 2, i32* getelementptr inbounds ([4 x i32]* @x, i64 0, i64 2) release, align 8
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store i32 0, i32* getelementptr inbounds ([4 x i32]* @a, i64 0, i64 3), align 4
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store atomic i32 3, i32* getelementptr inbounds ([4 x i32]* @x, i64 0, i64 3) release, align 4
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ret void
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}
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