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llvm-svn: 101118
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Chris Lattner 2010-04-13 06:37:00 +00:00
parent 73c74b3153
commit 357413197e
1 changed files with 19 additions and 5 deletions
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@ -28,11 +28,12 @@
<p>Written by the <a href="http://llvm.org">LLVM Team</a></p> <p>Written by the <a href="http://llvm.org">LLVM Team</a></p>
</div> </div>
<!--
<h1 style="color:red">These are in-progress notes for the upcoming LLVM 2.7 <h1 style="color:red">These are in-progress notes for the upcoming LLVM 2.7
release.<br> release.<br>
You may prefer the You may prefer the
<a href="http://llvm.org/releases/2.6/docs/ReleaseNotes.html">LLVM 2.6 <a href="http://llvm.org/releases/2.6/docs/ReleaseNotes.html">LLVM 2.6
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<div class="doc_section"> <div class="doc_section">
@ -71,7 +72,7 @@ Almost dead code.
include/llvm/Analysis/LiveValues.h => Dan include/llvm/Analysis/LiveValues.h => Dan
lib/Transforms/IPO/MergeFunctions.cpp => consider for 2.8. lib/Transforms/IPO/MergeFunctions.cpp => consider for 2.8.
llvm/Analysis/PointerTracking.h => Edwin wants this, consider for 2.8. llvm/Analysis/PointerTracking.h => Edwin wants this, consider for 2.8.
ABCD, SCCVN, GEPSplitterPass ABCD, GEPSplitterPass
MSIL backend? MSIL backend?
lib/Transforms/Utils/SSI.cpp -> ABCD depends on it. lib/Transforms/Utils/SSI.cpp -> ABCD depends on it.
--> -->
@ -532,17 +533,30 @@ New SSAUpdater and MachineSSAUpdater classes for unstructured ssa updating,
them up. them up.
Combiner-AA improvements, why not on by default? Combiner-AA improvements, why not on by default?
Pre-regalloc tail duplication Pre-regalloc tail duplication
x86 sibcall optimization x86 sibcall / tailcall optimization in CCC mode.
New LSR with full strength reduction mode New LSR with full strength reduction mode
The most awesome sext / zext optimization pass. ? The most awesome sext / zext optimization pass. ?
Better code size analysis in loop unswitch, inliner code split out to a new
CodeMetrics class for reuse.
The ARM backend now has good support for ARMv4 backend (tested on StrongARM The ARM backend now has good support for ARMv4 backend (tested on StrongARM
hardware), previously only supported ARMv4T and newer. hardware), previously only supported ARMv4T and newer.
Half-float support in APFloat
Indirect branch + address of label (blog post), particularly useful for interpreters.
Many changes to the pass ordering for improved optimization effectiveness.
Opt now works conservatively if no target data is set (is this fully working?)
Target data now has notion of 'native' integer data types which optimizations can use.
ARM backend generates instructions in unified assembly syntax.
New Analysis/InstructionSimplify.h interface for simplifying instructions that don't exist.
Jump threading is now much more aggressive at simplifying correlated
conditionals and threading blocks with otherwise complex logic. CondProp pass
removed (functionality merged into jump threading).
X86 and XCore supports returning arbitrary return values, returning too many values is
supported by returning through a hidden pointer.
verbose-asm now produces information about spill slots and loop nests
Defaults to RTTI off, packagers should build with make REQUIRE_RTTI=1. Defaults to RTTI off, packagers should build with make REQUIRE_RTTI=1.
CondProp pass removed (functionality merged into jump threading).
AndersAA got removed (from 2.7 or mainline?) AndersAA got removed (from 2.7 or mainline?)
PredSimplify, LoopVR, GVNPRE got removed. PredSimplify, LoopVR, GVNPRE got removed.
LLVM command line tools now overwrite their output, before they would only do this with -f. LLVM command line tools now overwrite their output, before they would only do this with -f.