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Don't send PHI nodes down to SelectionDAGBuilder of FastISel, since
they end up doing nothing. llvm-svn: 101904
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@ -52,6 +52,7 @@
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetLowering.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "FunctionLoweringInfo.h"
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using namespace llvm;
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@ -692,10 +693,6 @@ FastISel::SelectOperator(const User *I, unsigned Opcode) {
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// Nothing to emit.
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return true;
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case Instruction::PHI:
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// PHI nodes are already emitted.
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return true;
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case Instruction::Alloca:
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// FunctionLowering has the static-sized case covered.
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if (StaticAllocaMap.count(cast<AllocaInst>(I)))
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@ -735,6 +732,9 @@ FastISel::SelectOperator(const User *I, unsigned Opcode) {
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return true;
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}
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case Instruction::PHI:
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llvm_unreachable("FastISel shouldn't visit PHI nodes!");
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default:
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// Unhandled instruction. Halt "fast" selection and bail.
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return false;
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@ -621,6 +621,10 @@ void SelectionDAGBuilder::visit(const Instruction &I) {
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CurDebugLoc = DebugLoc();
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}
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void SelectionDAGBuilder::visitPHI(const PHINode &) {
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llvm_unreachable("SelectionDAGBuilder shouldn't visit PHI nodes!");
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}
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void SelectionDAGBuilder::visit(unsigned Opcode, const User &I) {
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// Note: this doesn't use InstVisitor, because it has to work with
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// ConstantExpr's in addition to instructions.
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@ -468,7 +468,7 @@ private:
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void visitAlloca(const AllocaInst &I);
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void visitLoad(const LoadInst &I);
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void visitStore(const StoreInst &I);
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void visitPHI(const PHINode &I) { } // PHI nodes are handled specially.
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void visitPHI(const PHINode &I);
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void visitCall(const CallInst &I);
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bool visitMemCmpCall(const CallInst &I);
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@ -728,7 +728,7 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
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const BasicBlock *LLVMBB = &*I;
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MachineBasicBlock *BB = FuncInfo->MBBMap[LLVMBB];
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BasicBlock::const_iterator const Begin = LLVMBB->begin();
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BasicBlock::const_iterator const Begin = LLVMBB->getFirstNonPHI();
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BasicBlock::const_iterator const End = LLVMBB->end();
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BasicBlock::const_iterator BI = Begin;
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