mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2025-01-13 15:11:39 +00:00
Properly constrain register classes in 2-addr.
X86 has 2-addr instructions with different constraints on the tied def and use operands. One is GR32, one is GR32_NOSP. llvm-svn: 157149
This commit is contained in:
parent
e2ec343323
commit
3979d32abd
@ -1555,6 +1555,12 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
|
||||
MO.setIsKill(false);
|
||||
RemovedKillFlag = true;
|
||||
}
|
||||
|
||||
// Make sure regA is a legal regclass for the SrcIdx operand.
|
||||
if (TargetRegisterInfo::isVirtualRegister(regA) &&
|
||||
TargetRegisterInfo::isVirtualRegister(regB))
|
||||
MRI->constrainRegClass(regA, MRI->getRegClass(regB));
|
||||
|
||||
MO.setReg(regA);
|
||||
|
||||
if (isCopy)
|
||||
|
@ -1,4 +1,4 @@
|
||||
; RUN: llc < %s -march=x86 | FileCheck %s
|
||||
; RUN: llc < %s -march=x86 -verify-coalescing | FileCheck %s
|
||||
|
||||
define i32* @test1(i32* %P, i32 %X) {
|
||||
; CHECK: test1:
|
||||
|
Loading…
x
Reference in New Issue
Block a user