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During bittest switch lowering emit shift in the test block, which should (theoretically)

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allow us to generate more efficient code. We don't do this now though :)

llvm-svn: 63027
This commit is contained in:
Anton Korobeynikov 2009-01-26 19:26:01 +00:00
parent 9bcbf6b882
commit 39dee7256d
1 changed files with 9 additions and 11 deletions
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20
lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
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@ -1416,14 +1416,8 @@ void SelectionDAGLowering::visitBitTestHeader(BitTestBlock &B) {
else
ShiftOp = DAG.getNode(ISD::ZERO_EXTEND, TLI.getShiftAmountTy(), SUB);
// Make desired shift
SDValue SwitchVal = DAG.getNode(ISD::SHL, TLI.getPointerTy(),
DAG.getConstant(1, TLI.getPointerTy()),
ShiftOp);
unsigned SwitchReg = FuncInfo.MakeReg(TLI.getPointerTy());
SDValue CopyTo = DAG.getCopyToReg(getControlRoot(), SwitchReg, SwitchVal);
B.Reg = SwitchReg;
B.Reg = FuncInfo.MakeReg(TLI.getShiftAmountTy());
SDValue CopyTo = DAG.getCopyToReg(getControlRoot(), B.Reg, ShiftOp);
// Set NextBlock to be the MBB immediately after the current one, if any.
// This is used to avoid emitting unnecessary branches to the next block.
@ -1453,10 +1447,14 @@ void SelectionDAGLowering::visitBitTestHeader(BitTestBlock &B) {
void SelectionDAGLowering::visitBitTestCase(MachineBasicBlock* NextMBB,
unsigned Reg,
BitTestCase &B) {
// Emit bit tests and jumps
SDValue SwitchVal = DAG.getCopyFromReg(getControlRoot(), Reg,
TLI.getPointerTy());
// Make desired shift
SDValue ShiftOp = DAG.getCopyFromReg(getControlRoot(), Reg,
TLI.getShiftAmountTy());
SDValue SwitchVal = DAG.getNode(ISD::SHL, TLI.getPointerTy(),
DAG.getConstant(1, TLI.getPointerTy()),
ShiftOp);
// Emit bit tests and jumps
SDValue AndOp = DAG.getNode(ISD::AND, TLI.getPointerTy(), SwitchVal,
DAG.getConstant(B.Mask, TLI.getPointerTy()));
SDValue AndCmp = DAG.getSetCC(TLI.getSetCCResultType(AndOp.getValueType()),