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When computing the demanded bits of Load SDNodes, make sure that we are looking at the loaded-value operand and not the ptr result (in case of pre-inc loads).

Browse Source 
rdar://13348420

llvm-svn: 177596
This commit is contained in:
Nadav Rotem 2013-03-20 22:53:44 +00:00
parent 78d3bdea74
commit 3a9f2d7de8
2 changed files with 51 additions and 12 deletions
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28
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
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@ -1917,7 +1917,8 @@ void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero,
}
case ISD::LOAD: {
LoadSDNode *LD = cast<LoadSDNode>(Op);
if (ISD::isZEXTLoad(Op.getNode())) {
// If this is a ZEXTLoad and we are looking at the loaded value.
if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
EVT VT = LD->getMemoryVT();
unsigned MemBits = VT.getScalarType().getSizeInBits();
KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
@ -2287,17 +2288,20 @@ unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
break;
}
// Handle LOADX separately here. EXTLOAD case will fallthrough.
if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
unsigned ExtType = LD->getExtensionType();
switch (ExtType) {
default: break;
case ISD::SEXTLOAD: // '17' bits known
Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
return VTBits-Tmp+1;
case ISD::ZEXTLOAD: // '16' bits known
Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
return VTBits-Tmp;
// If we are looking at the loaded value of the SDNode.
if (Op.getResNo() == 0) {
// Handle LOADX separately here. EXTLOAD case will fallthrough.
if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
unsigned ExtType = LD->getExtensionType();
switch (ExtType) {
default: break;
case ISD::SEXTLOAD: // '17' bits known
Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
return VTBits-Tmp+1;
case ISD::ZEXTLOAD: // '16' bits known
Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
return VTBits-Tmp;
}
}
}

35
test/CodeGen/ARM/zextload_demandedbits.ll Normal file
View File

@ -0,0 +1,35 @@
; RUN: llc < %s -march=arm -mtriple="thumbv7-apple-ios3.0.0" | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
%struct.eggs = type { %struct.spam, i16 }
%struct.spam = type { [3 x i32] }
%struct.barney = type { [2 x i32], [2 x i32] }
; Make sure that the sext op does not get lost due to ComputeMaskedBits.
; CHECK: quux
; CHECK: lsl
; CHECK: asr
; CHECK: bl
; CHECK: pop
define void @quux(%struct.eggs* %arg) {
bb:
%tmp1 = getelementptr inbounds %struct.eggs* %arg, i32 0, i32 1
%0 = load i16* %tmp1, align 2
%tobool = icmp eq i16 %0, 0
br i1 %tobool, label %bb16, label %bb3
bb3: ; preds = %bb
%tmp4 = bitcast i16* %tmp1 to i8*
%tmp5 = ptrtoint i16* %tmp1 to i32
%tmp6 = shl i32 %tmp5, 20
%tmp7 = ashr exact i32 %tmp6, 20
%tmp14 = getelementptr inbounds %struct.barney* undef, i32 %tmp7
%tmp15 = tail call i32 @widget(%struct.barney* %tmp14, i8* %tmp4, i32 %tmp7)
br label %bb16
bb16: ; preds = %bb3, %bb
ret void
}
declare i32 @widget(%struct.barney*, i8*, i32)