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[SCEV] Add smin support to getRangeRef

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We were failing to compute trip counts (both exact and maximum) for any loop which involved a comparison against either an umin or smin. It looks like this simply got missed when we added smin/umin to SCEV.  (Note: umin was submitted separately earlier today.  Turned out two folks hit this at the same time.)

Differential Revision: https://reviews.llvm.org/D67514

llvm-svn: 371776
This commit is contained in:
Philip Reames 2019-09-12 21:32:27 +00:00
parent be6798af61
commit 3b71e989fe
4 changed files with 51 additions and 37 deletions
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8
lib/Analysis/ScalarEvolution.cpp
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@ -5596,6 +5596,14 @@ ScalarEvolution::getRangeRef(const SCEV *S,
ConservativeResult.intersectWith(X, RangeType));
}
if (const SCEVSMinExpr *SMin = dyn_cast<SCEVSMinExpr>(S)) {
ConstantRange X = getRangeRef(SMin->getOperand(0), SignHint);
for (unsigned i = 1, e = SMin->getNumOperands(); i != e; ++i)
X = X.smin(getRangeRef(SMin->getOperand(i), SignHint));
return setRange(SMin, SignHint,
ConservativeResult.intersectWith(X, RangeType));
}
if (const SCEVUMinExpr *UMin = dyn_cast<SCEVUMinExpr>(S)) {
ConstantRange X = getRangeRef(UMin->getOperand(0), SignHint);
for (unsigned i = 1, e = UMin->getNumOperands(); i != e; ++i)

4
test/Analysis/ScalarEvolution/max-expr-cache.ll
View File

@ -55,7 +55,7 @@ bb4:
%tmp45 = icmp slt i32 %tmp43, 256
%tmp46 = select i1 %tmp45, i32 %tmp43, i32 256
; CHECK: %tmp46 = select i1 %tmp45, i32 %tmp43, i32 256
; CHECK-NEXT: --> (256 smin (1 + (256 smin (1 + (256 smin (1 + (256 smin (1 + (256 smin (1 + (256 smin (1 + (256 smin (1 + (256 smin {%tmp3,+,-256}<%bb4>)) smin {%tmp3,+,-256}<%bb4>)) smin {%tmp3,+,-256}<%bb4>)) smin {%tmp3,+,-256}<%bb4>)) smin {%tmp3,+,-256}<%bb4>)) smin {%tmp3,+,-256}<%bb4>)) smin {%tmp3,+,-256}<%bb4>)) smin {%tmp3,+,-256}<%bb4>)
; CHECK-NEXT: --> (256 smin (1 + (256 smin (1 + (256 smin (1 + (256 smin (1 + (256 smin (1 + (256 smin (1 + (256 smin (1 + (256 smin {%tmp3,+,-256}<%bb4>))<nsw> smin {%tmp3,+,-256}<%bb4>))<nsw> smin {%tmp3,+,-256}<%bb4>))<nsw> smin {%tmp3,+,-256}<%bb4>))<nsw> smin {%tmp3,+,-256}<%bb4>))<nsw> smin {%tmp3,+,-256}<%bb4>))<nsw> smin {%tmp3,+,-256}<%bb4>))<nsw> smin {%tmp3,+,-256}<%bb4>) U: [-2147483648,257) S: [-2147483648,257)
%tmp47 = icmp sgt i32 %tmp44, %tmp46
%tmp48 = select i1 %tmp47, i32 %tmp44, i32 %tmp46
%tmp49 = ashr i32 %tmp48, 3
@ -130,7 +130,7 @@ bb4:
%tmp45 = icmp ult i32 %tmp43, 256
%tmp46 = select i1 %tmp45, i32 %tmp43, i32 256
; CHECK: %tmp46 = select i1 %tmp45, i32 %tmp43, i32 256
; CHECK-NEXT: --> (256 umin (1 + (256 umin (1 + (256 umin (1 + (256 umin (1 + (256 umin (1 + (256 umin (1 + (256 umin (1 + (256 umin {%tmp3,+,-256}<%bb4>))<nuw><nsw> umin {%tmp3,+,-256}<%bb4>))<nuw><nsw> umin {%tmp3,+,-256}<%bb4>))<nuw><nsw> umin {%tmp3,+,-256}<%bb4>))<nuw><nsw> umin {%tmp3,+,-256}<%bb4>))<nuw><nsw> umin {%tmp3,+,-256}<%bb4>))<nuw><nsw> umin {%tmp3,+,-256}<%bb4>))<nuw><nsw> umin {%tmp3,+,-256}<%bb4>) U: [0,257) S: [0,257) Exits: <<Unknown>> LoopDispositions: { %bb4: Computable, %bb53: Invariant }
; CHECK-NEXT: --> (256 umin (1 + (256 umin (1 + (256 umin (1 + (256 umin (1 + (256 umin (1 + (256 umin (1 + (256 umin (1 + (256 umin {%tmp3,+,-256}<%bb4>))<nuw><nsw> umin {%tmp3,+,-256}<%bb4>))<nuw><nsw> umin {%tmp3,+,-256}<%bb4>))<nuw><nsw> umin {%tmp3,+,-256}<%bb4>))<nuw><nsw> umin {%tmp3,+,-256}<%bb4>))<nuw><nsw> umin {%tmp3,+,-256}<%bb4>))<nuw><nsw> umin {%tmp3,+,-256}<%bb4>))<nuw><nsw> umin {%tmp3,+,-256}<%bb4>) U: [0,257) S: [0,257)
%tmp47 = icmp ugt i32 %tmp44, %tmp46
%tmp48 = select i1 %tmp47, i32 %tmp44, i32 %tmp46
%tmp49 = ashr i32 %tmp48, 3

20
test/Analysis/ScalarEvolution/trip-count15.ll
View File

@ -14,6 +14,8 @@ define void @umin_unsigned_check(i64 %n) {
; CHECK-NEXT: Loop %loop: backedge-taken count is (1 + (4096 umin %n))<nuw><nsw>
; CHECK-NEXT: Loop %loop: max backedge-taken count is 4097
; CHECK-NEXT: Loop %loop: Predicated backedge-taken count is (1 + (4096 umin %n))<nuw><nsw>
; CHECK-NEXT: Predicates:
; CHECK: Loop %loop: Trip multiple is 1
;
entry:
%min.cmp = icmp ult i64 4096, %n
@ -42,6 +44,8 @@ define void @umin_signed_check(i64 %n) {
; CHECK-NEXT: Loop %loop: backedge-taken count is (1 + (4096 umin %n))<nuw><nsw>
; CHECK-NEXT: Loop %loop: max backedge-taken count is 4097
; CHECK-NEXT: Loop %loop: Predicated backedge-taken count is (1 + (4096 umin %n))<nuw><nsw>
; CHECK-NEXT: Predicates:
; CHECK: Loop %loop: Trip multiple is 1
;
entry:
%min.cmp = icmp ult i64 4096, %n
@ -61,15 +65,17 @@ define void @smin_signed_check(i64 %n) {
; CHECK-LABEL: 'smin_signed_check'
; CHECK-NEXT: Classifying expressions for: @smin_signed_check
; CHECK-NEXT: %min.n = select i1 %min.cmp, i64 4096, i64 %n
; CHECK-NEXT: --> (4096 smin %n) U: full-set S: full-set
; CHECK-NEXT: --> (4096 smin %n) U: [-9223372036854775808,4097) S: [-9223372036854775808,4097)
; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
; CHECK-NEXT: --> {0,+,1}<%loop> U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Computable }
; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4098) S: [0,4098) Exits: (0 smax (1 + (4096 smin %n))<nsw>) LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %iv.next = add i64 %iv, 1
; CHECK-NEXT: --> {1,+,1}<%loop> U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Computable }
; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4099) S: [1,4099) Exits: (1 + (0 smax (1 + (4096 smin %n))<nsw>))<nuw><nsw> LoopDispositions: { %loop: Computable }
; CHECK-NEXT: Determining loop execution counts for: @smin_signed_check
; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count.
; CHECK-NEXT: Loop %loop: Unpredictable max backedge-taken count.
; CHECK-NEXT: Loop %loop: Unpredictable predicated backedge-taken count.
; CHECK-NEXT: Loop %loop: backedge-taken count is (0 smax (1 + (4096 smin %n))<nsw>)
; CHECK-NEXT: Loop %loop: max backedge-taken count is 4097
; CHECK-NEXT: Loop %loop: Predicated backedge-taken count is (0 smax (1 + (4096 smin %n))<nsw>)
; CHECK-NEXT: Predicates:
; CHECK: Loop %loop: Trip multiple is 1
;
entry:
%min.cmp = icmp slt i64 4096, %n
@ -89,7 +95,7 @@ define void @smin_unsigned_check(i64 %n) {
; CHECK-LABEL: 'smin_unsigned_check'
; CHECK-NEXT: Classifying expressions for: @smin_unsigned_check
; CHECK-NEXT: %min.n = select i1 %min.cmp, i64 4096, i64 %n
; CHECK-NEXT: --> (4096 smin %n) U: full-set S: full-set
; CHECK-NEXT: --> (4096 smin %n) U: [-9223372036854775808,4097) S: [-9223372036854775808,4097)
; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
; CHECK-NEXT: --> {0,+,1}<%loop> U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %iv.next = add i64 %iv, 1

56
test/Transforms/IRCE/rc-negative-bound.ll
View File

@ -114,18 +114,18 @@ define void @test_03(i32 *%arr, i32 %n, i32 %bound) {
; CHECK: loop.preheader:
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[BOUND:%.*]], -2147483647
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[TMP0]], 0
; CHECK-NEXT: [[SMIN:%.*]] = select i1 [[TMP1]], i32 [[TMP0]], i32 0
; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[BOUND]], [[SMIN]]
; CHECK-NEXT: [[SMAX:%.*]] = select i1 [[TMP1]], i32 [[TMP0]], i32 0
; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[BOUND]], [[SMAX]]
; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[BOUND]], 0
; CHECK-NEXT: [[SMAX:%.*]] = select i1 [[TMP3]], i32 [[BOUND]], i32 0
; CHECK-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[SMAX]], -1
; CHECK-NEXT: [[SMIN1:%.*]] = select i1 [[TMP4]], i32 [[SMAX]], i32 -1
; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[SMIN1]], 1
; CHECK-NEXT: [[SMIN:%.*]] = select i1 [[TMP3]], i32 [[BOUND]], i32 0
; CHECK-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[SMIN]], -1
; CHECK-NEXT: [[SMAX1:%.*]] = select i1 [[TMP4]], i32 [[SMIN]], i32 -1
; CHECK-NEXT: [[TMP5:%.*]] = add nsw i32 [[SMAX1]], 1
; CHECK-NEXT: [[TMP6:%.*]] = mul i32 [[TMP2]], [[TMP5]]
; CHECK-NEXT: [[TMP7:%.*]] = icmp slt i32 [[N]], [[TMP6]]
; CHECK-NEXT: [[SMAX2:%.*]] = select i1 [[TMP7]], i32 [[N]], i32 [[TMP6]]
; CHECK-NEXT: [[TMP8:%.*]] = icmp sgt i32 [[SMAX2]], 0
; CHECK-NEXT: [[EXIT_MAINLOOP_AT:%.*]] = select i1 [[TMP8]], i32 [[SMAX2]], i32 0
; CHECK-NEXT: [[SMIN2:%.*]] = select i1 [[TMP7]], i32 [[N]], i32 [[TMP6]]
; CHECK-NEXT: [[TMP8:%.*]] = icmp sgt i32 [[SMIN2]], 0
; CHECK-NEXT: [[EXIT_MAINLOOP_AT:%.*]] = select i1 [[TMP8]], i32 [[SMIN2]], i32 0
; CHECK-NEXT: [[TMP9:%.*]] = icmp slt i32 0, [[EXIT_MAINLOOP_AT]]
; CHECK-NEXT: br i1 [[TMP9]], label [[LOOP_PREHEADER4:%.*]], label [[MAIN_PSEUDO_EXIT:%.*]]
; CHECK: loop.preheader4:
@ -207,11 +207,11 @@ define void @test_04(i32 *%arr, i32 %n, i32 %bound) {
; CHECK-NEXT: br i1 [[FIRST_ITR_CHECK]], label [[LOOP_PREHEADER:%.*]], label [[EXIT:%.*]]
; CHECK: loop.preheader:
; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i32 [[BOUND:%.*]], 0
; CHECK-NEXT: [[SMAX:%.*]] = select i1 [[TMP0]], i32 [[BOUND]], i32 0
; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[BOUND]], [[SMAX]]
; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[SMAX]], -1
; CHECK-NEXT: [[SMIN:%.*]] = select i1 [[TMP2]], i32 [[SMAX]], i32 -1
; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[SMIN]], 1
; CHECK-NEXT: [[SMIN:%.*]] = select i1 [[TMP0]], i32 [[BOUND]], i32 0
; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[BOUND]], [[SMIN]]
; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[SMIN]], -1
; CHECK-NEXT: [[SMAX:%.*]] = select i1 [[TMP2]], i32 [[SMIN]], i32 -1
; CHECK-NEXT: [[TMP3:%.*]] = add nsw i32 [[SMAX]], 1
; CHECK-NEXT: [[TMP4:%.*]] = mul i32 [[TMP1]], [[TMP3]]
; CHECK-NEXT: [[TMP5:%.*]] = icmp ult i32 [[N]], [[TMP4]]
; CHECK-NEXT: [[EXIT_MAINLOOP_AT:%.*]] = select i1 [[TMP5]], i32 [[N]], i32 [[TMP4]]
@ -402,18 +402,18 @@ define void @test_07(i32 *%arr, i32 %n, i32 %bound) {
; CHECK: loop.preheader:
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[BOUND:%.*]], -2147483647
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[TMP0]], 0
; CHECK-NEXT: [[SMIN:%.*]] = select i1 [[TMP1]], i32 [[TMP0]], i32 0
; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[BOUND]], [[SMIN]]
; CHECK-NEXT: [[SMAX:%.*]] = select i1 [[TMP1]], i32 [[TMP0]], i32 0
; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[BOUND]], [[SMAX]]
; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[BOUND]], 0
; CHECK-NEXT: [[SMAX:%.*]] = select i1 [[TMP3]], i32 [[BOUND]], i32 0
; CHECK-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[SMAX]], -1
; CHECK-NEXT: [[SMIN1:%.*]] = select i1 [[TMP4]], i32 [[SMAX]], i32 -1
; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[SMIN1]], 1
; CHECK-NEXT: [[SMIN:%.*]] = select i1 [[TMP3]], i32 [[BOUND]], i32 0
; CHECK-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[SMIN]], -1
; CHECK-NEXT: [[SMAX1:%.*]] = select i1 [[TMP4]], i32 [[SMIN]], i32 -1
; CHECK-NEXT: [[TMP5:%.*]] = add nsw i32 [[SMAX1]], 1
; CHECK-NEXT: [[TMP6:%.*]] = mul i32 [[TMP2]], [[TMP5]]
; CHECK-NEXT: [[TMP7:%.*]] = icmp slt i32 [[N]], [[TMP6]]
; CHECK-NEXT: [[SMAX2:%.*]] = select i1 [[TMP7]], i32 [[N]], i32 [[TMP6]]
; CHECK-NEXT: [[TMP8:%.*]] = icmp sgt i32 [[SMAX2]], 0
; CHECK-NEXT: [[EXIT_MAINLOOP_AT:%.*]] = select i1 [[TMP8]], i32 [[SMAX2]], i32 0
; CHECK-NEXT: [[SMIN2:%.*]] = select i1 [[TMP7]], i32 [[N]], i32 [[TMP6]]
; CHECK-NEXT: [[TMP8:%.*]] = icmp sgt i32 [[SMIN2]], 0
; CHECK-NEXT: [[EXIT_MAINLOOP_AT:%.*]] = select i1 [[TMP8]], i32 [[SMIN2]], i32 0
; CHECK-NEXT: [[TMP9:%.*]] = icmp slt i32 0, [[EXIT_MAINLOOP_AT]]
; CHECK-NEXT: br i1 [[TMP9]], label [[LOOP_PREHEADER4:%.*]], label [[MAIN_PSEUDO_EXIT:%.*]]
; CHECK: loop.preheader4:
@ -497,11 +497,11 @@ define void @test_08(i32 *%arr, i32 %n, i32 %bound) {
; CHECK-NEXT: br i1 [[FIRST_ITR_CHECK]], label [[LOOP_PREHEADER:%.*]], label [[EXIT:%.*]]
; CHECK: loop.preheader:
; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i32 [[BOUND:%.*]], 0
; CHECK-NEXT: [[SMAX:%.*]] = select i1 [[TMP0]], i32 [[BOUND]], i32 0
; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[BOUND]], [[SMAX]]
; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[SMAX]], -1
; CHECK-NEXT: [[SMIN:%.*]] = select i1 [[TMP2]], i32 [[SMAX]], i32 -1
; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[SMIN]], 1
; CHECK-NEXT: [[SMIN:%.*]] = select i1 [[TMP0]], i32 [[BOUND]], i32 0
; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[BOUND]], [[SMIN]]
; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[SMIN]], -1
; CHECK-NEXT: [[SMAX:%.*]] = select i1 [[TMP2]], i32 [[SMIN]], i32 -1
; CHECK-NEXT: [[TMP3:%.*]] = add nsw i32 [[SMAX]], 1
; CHECK-NEXT: [[TMP4:%.*]] = mul i32 [[TMP1]], [[TMP3]]
; CHECK-NEXT: [[TMP5:%.*]] = icmp ult i32 [[N]], [[TMP4]]
; CHECK-NEXT: [[EXIT_MAINLOOP_AT:%.*]] = select i1 [[TMP5]], i32 [[N]], i32 [[TMP4]]