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AArch64: remove arm64 triple enumerator.
Having both Triple::arm64 and Triple::aarch64 is extremely confusing, and invites bugs where only one is checked. In reality, the only legitimate difference between the two (arm64 usually means iOS) is also present in the OS part of the triple and that's what should be checked. We still parse the "arm64" triple, just canonicalise it to Triple::aarch64, so there aren't any LLVM-side test changes. llvm-svn: 213743
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@ -48,8 +48,6 @@ public:
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arm, // ARM (little endian): arm, armv.*, xscale
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armeb, // ARM (big endian): armeb
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arm64, // ARM64 (little endian): arm64
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arm64_be, // ARM64 (big endian): arm64_be
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aarch64, // AArch64 (little endian): aarch64
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aarch64_be, // AArch64 (big endian): aarch64_be
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hexagon, // Hexagon: hexagon
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@ -525,8 +525,7 @@ void RuntimeDyldImpl::addRelocationForSymbol(const RelocationEntry &RE,
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uint8_t *RuntimeDyldImpl::createStubFunction(uint8_t *Addr,
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unsigned AbiVariant) {
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if (Arch == Triple::aarch64 || Arch == Triple::aarch64_be ||
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Arch == Triple::arm64 || Arch == Triple::arm64_be) {
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if (Arch == Triple::aarch64 || Arch == Triple::aarch64_be) {
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// This stub has to be able to access the full address space,
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// since symbol lookup won't necessarily find a handy, in-range,
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// PLT stub for functions which could be anywhere.
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@ -911,8 +911,6 @@ void RuntimeDyldELF::resolveRelocation(const SectionEntry &Section,
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break;
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case Triple::aarch64:
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case Triple::aarch64_be:
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case Triple::arm64:
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case Triple::arm64_be:
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resolveAArch64Relocation(Section, Offset, Value, Type, Addend);
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break;
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case Triple::arm: // Fall through.
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@ -1018,8 +1016,7 @@ relocation_iterator RuntimeDyldELF::processRelocationRef(
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DEBUG(dbgs() << "\t\tSectionID: " << SectionID << " Offset: " << Offset
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<< "\n");
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if ((Arch == Triple::aarch64 || Arch == Triple::aarch64_be ||
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Arch == Triple::arm64 || Arch == Triple::arm64_be) &&
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if ((Arch == Triple::aarch64 || Arch == Triple::aarch64_be) &&
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(RelType == ELF::R_AARCH64_CALL26 || RelType == ELF::R_AARCH64_JUMP26)) {
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// This is an AArch64 branch relocation, need to use a stub function.
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DEBUG(dbgs() << "\t\tThis is an AArch64 branch relocation.");
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@ -1431,8 +1428,6 @@ size_t RuntimeDyldELF::getGOTEntrySize() {
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case Triple::x86_64:
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case Triple::aarch64:
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case Triple::aarch64_be:
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case Triple::arm64:
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case Triple::arm64_be:
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case Triple::ppc64:
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case Triple::ppc64le:
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case Triple::systemz:
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@ -58,8 +58,7 @@ class RuntimeDyldELF : public RuntimeDyldImpl {
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uint64_t Value, uint32_t Type, int64_t Addend);
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unsigned getMaxStubSize() override {
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if (Arch == Triple::aarch64 || Arch == Triple::arm64 ||
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Arch == Triple::aarch64_be || Arch == Triple::arm64_be)
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if (Arch == Triple::aarch64 || Arch == Triple::aarch64_be)
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return 20; // movz; movk; movk; movk; br
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if (Arch == Triple::arm || Arch == Triple::thumb)
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return 8; // 32-bit instruction and 32-bit address
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@ -214,7 +214,7 @@ llvm::RuntimeDyldMachO::create(Triple::ArchType Arch, RTDyldMemoryManager *MM) {
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llvm_unreachable("Unsupported target for RuntimeDyldMachO.");
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break;
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case Triple::arm: return make_unique<RuntimeDyldMachOARM>(MM);
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case Triple::arm64: return make_unique<RuntimeDyldMachOAArch64>(MM);
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case Triple::aarch64: return make_unique<RuntimeDyldMachOAArch64>(MM);
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case Triple::x86: return make_unique<RuntimeDyldMachOI386>(MM);
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case Triple::x86_64: return make_unique<RuntimeDyldMachOX86_64>(MM);
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}
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@ -299,8 +299,7 @@ bool LTOCodeGenerator::determineTarget(std::string &errMsg) {
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MCpu = "core2";
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else if (Triple.getArch() == llvm::Triple::x86)
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MCpu = "yonah";
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else if (Triple.getArch() == llvm::Triple::arm64 ||
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Triple.getArch() == llvm::Triple::aarch64)
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else if (Triple.getArch() == llvm::Triple::aarch64)
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MCpu = "cyclone";
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}
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@ -138,8 +138,7 @@ LTOModule *LTOModule::makeLTOModule(std::unique_ptr<MemoryBuffer> Buffer,
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CPU = "core2";
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else if (Triple.getArch() == llvm::Triple::x86)
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CPU = "yonah";
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else if (Triple.getArch() == llvm::Triple::arm64 ||
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Triple.getArch() == llvm::Triple::aarch64)
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else if (Triple.getArch() == llvm::Triple::aarch64)
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CPU = "cyclone";
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}
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@ -24,7 +24,7 @@ static bool useCompactUnwind(const Triple &T) {
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return false;
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// aarch64 always has it.
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if (T.getArch() == Triple::arm64 || T.getArch() == Triple::aarch64)
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if (T.getArch() == Triple::aarch64)
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return true;
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// Use it on newer version of OS X.
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@ -43,8 +43,7 @@ void MCObjectFileInfo::InitMachOMCObjectFileInfo(Triple T) {
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// MachO
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SupportsWeakOmittedEHFrame = false;
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if (T.isOSDarwin() &&
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(T.getArch() == Triple::arm64 || T.getArch() == Triple::aarch64))
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if (T.isOSDarwin() && T.getArch() == Triple::aarch64)
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SupportsCompactUnwindWithoutEHFrame = true;
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PersonalityEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel
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@ -178,7 +177,7 @@ void MCObjectFileInfo::InitMachOMCObjectFileInfo(Triple T) {
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if (T.getArch() == Triple::x86_64 || T.getArch() == Triple::x86)
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CompactUnwindDwarfEHFrameOnly = 0x04000000;
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else if (T.getArch() == Triple::arm64 || T.getArch() == Triple::aarch64)
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else if (T.getArch() == Triple::aarch64)
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CompactUnwindDwarfEHFrameOnly = 0x03000000;
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}
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@ -321,8 +320,6 @@ void MCObjectFileInfo::InitELFMCObjectFileInfo(Triple T) {
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break;
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case Triple::aarch64:
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case Triple::aarch64_be:
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case Triple::arm64:
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case Triple::arm64_be:
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// The small model guarantees static code/data size < 4GB, but not where it
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// will be in memory. Most of these could end up >2GB away so even a signed
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// pc-relative 32-bit address is insufficient, theoretically.
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@ -827,7 +824,7 @@ void MCObjectFileInfo::InitMCObjectFileInfo(StringRef T, Reloc::Model relocm,
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// cellspu-apple-darwin. Perhaps we should fix in Triple?
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if ((Arch == Triple::x86 || Arch == Triple::x86_64 ||
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Arch == Triple::arm || Arch == Triple::thumb ||
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Arch == Triple::arm64 || Arch == Triple::aarch64 ||
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Arch == Triple::aarch64 ||
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Arch == Triple::ppc || Arch == Triple::ppc64 ||
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Arch == Triple::UnknownArch) &&
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(TT.isOSDarwin() || TT.isOSBinFormatMachO())) {
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@ -755,7 +755,6 @@ MachOObjectFile::getRelocationTypeName(DataRefImpl Rel,
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res = Table[RType];
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break;
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}
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case Triple::arm64:
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case Triple::aarch64: {
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static const char *const Table[] = {
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"ARM64_RELOC_UNSIGNED", "ARM64_RELOC_SUBTRACTOR",
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@ -1303,7 +1302,7 @@ Triple::ArchType MachOObjectFile::getArch(uint32_t CPUType) {
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case llvm::MachO::CPU_TYPE_ARM:
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return Triple::arm;
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case llvm::MachO::CPU_TYPE_ARM64:
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return Triple::arm64;
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return Triple::aarch64;
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case llvm::MachO::CPU_TYPE_POWERPC:
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return Triple::ppc;
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case llvm::MachO::CPU_TYPE_POWERPC64:
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@ -23,8 +23,6 @@ const char *Triple::getArchTypeName(ArchType Kind) {
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case aarch64_be: return "aarch64_be";
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case arm: return "arm";
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case armeb: return "armeb";
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case arm64: return "arm64";
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case arm64_be: return "arm64_be";
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case hexagon: return "hexagon";
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case mips: return "mips";
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case mipsel: return "mipsel";
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@ -61,8 +59,6 @@ const char *Triple::getArchTypePrefix(ArchType Kind) {
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default:
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return nullptr;
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case arm64:
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case arm64_be:
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case aarch64:
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case aarch64_be: return "aarch64";
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@ -181,10 +177,10 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) {
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return StringSwitch<Triple::ArchType>(Name)
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.Case("aarch64", aarch64)
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.Case("aarch64_be", aarch64_be)
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.Case("arm64", aarch64) // "arm64" is an alias for "aarch64"
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.Case("arm64_be", aarch64_be) // "arm64_be" is an alias for "aarch64_be"
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.Case("arm", arm)
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.Case("armeb", armeb)
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.Case("arm64", arm64)
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.Case("arm64_be", arm64_be)
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.Case("mips", mips)
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.Case("mipsel", mipsel)
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.Case("mips64", mips64)
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@ -233,7 +229,6 @@ const char *Triple::getArchNameForAssembler() {
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.Cases("armv7", "thumbv7", "armv7")
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.Case("armeb", "armeb")
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.Case("arm64", "arm64")
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.Case("arm64_be", "arm64")
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.Case("r600", "r600")
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.Case("nvptx", "nvptx")
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.Case("nvptx64", "nvptx64")
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@ -255,6 +250,8 @@ static Triple::ArchType parseArch(StringRef ArchName) {
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.Case("powerpc64le", Triple::ppc64le)
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.Case("aarch64", Triple::aarch64)
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.Case("aarch64_be", Triple::aarch64_be)
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.Case("arm64", Triple::aarch64)
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.Case("arm64_be", Triple::aarch64_be)
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.Cases("arm", "xscale", Triple::arm)
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// FIXME: It would be good to replace these with explicit names for all the
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// various suffixes supported.
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@ -265,8 +262,6 @@ static Triple::ArchType parseArch(StringRef ArchName) {
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.StartsWith("thumbv", Triple::thumb)
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.Case("thumbeb", Triple::thumbeb)
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.StartsWith("thumbebv", Triple::thumbeb)
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.Case("arm64", Triple::arm64)
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.Case("arm64_be", Triple::arm64_be)
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.Case("msp430", Triple::msp430)
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.Cases("mips", "mipseb", "mipsallegrex", Triple::mips)
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.Cases("mipsel", "mipsallegrexel", Triple::mipsel)
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@ -742,7 +737,7 @@ void Triple::getiOSVersion(unsigned &Major, unsigned &Minor,
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getOSVersion(Major, Minor, Micro);
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// Default to 5.0 (or 7.0 for arm64).
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if (Major == 0)
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Major = (getArch() == arm64) ? 7 : 5;
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Major = (getArch() == aarch64) ? 7 : 5;
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break;
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}
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}
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@ -835,8 +830,6 @@ static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
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case llvm::Triple::kalimba:
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return 32;
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case llvm::Triple::arm64:
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case llvm::Triple::arm64_be:
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case llvm::Triple::aarch64:
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case llvm::Triple::aarch64_be:
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case llvm::Triple::mips64:
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@ -871,8 +864,6 @@ Triple Triple::get32BitArchVariant() const {
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case Triple::UnknownArch:
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case Triple::aarch64:
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case Triple::aarch64_be:
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case Triple::arm64:
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case Triple::arm64_be:
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case Triple::msp430:
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case Triple::systemz:
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case Triple::ppc64le:
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@ -941,8 +932,6 @@ Triple Triple::get64BitArchVariant() const {
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case Triple::sparcv9:
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case Triple::systemz:
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case Triple::x86_64:
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case Triple::arm64:
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case Triple::arm64_be:
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// Already 64-bit.
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break;
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@ -66,7 +66,7 @@ const MCExpr *AArch64MCAsmInfoDarwin::getExprForPersonalitySymbol(
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AArch64MCAsmInfoELF::AArch64MCAsmInfoELF(StringRef TT) {
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Triple T(TT);
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if (T.getArch() == Triple::arm64_be || T.getArch() == Triple::aarch64_be)
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if (T.getArch() == Triple::aarch64_be)
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IsLittleEndian = false;
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// We prefer NEON instructions to be printed in the short form.
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@ -19,13 +19,16 @@ Target TheARM64beTarget;
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} // end namespace llvm
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extern "C" void LLVMInitializeAArch64TargetInfo() {
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RegisterTarget<Triple::arm64, /*HasJIT=*/true> X(TheARM64leTarget, "arm64",
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"AArch64 (little endian)");
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RegisterTarget<Triple::arm64_be, /*HasJIT=*/true> Y(TheARM64beTarget, "arm64_be",
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"AArch64 (big endian)");
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// Now register the "arm64" name for use with "-march". We don't want it to
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// take possession of the Triple::aarch64 tag though.
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RegisterTarget<Triple::UnknownArch, /*HasJIT=*/true> X(
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TheARM64leTarget, "arm64", "ARM64 (little endian)");
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RegisterTarget<Triple::UnknownArch, /*HasJIT=*/true> Y(
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TheARM64beTarget, "arm64_be", "ARM64 (big endian)");
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RegisterTarget<Triple::aarch64, /*HasJIT=*/true> Z(
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TheAArch64leTarget, "aarch64", "AArch64 (little endian)");
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RegisterTarget<Triple::aarch64_be, /*HasJIT=*/true> W(
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TheAArch64beTarget, "aarch64_be", "AArch64 (big endian)");
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}
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