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some comments and cleanup
llvm-svn: 73818
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7b43ca847d
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3ffae2f77e
@ -818,9 +818,17 @@ void X86ATTAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
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TmpInst.addOperand(MCOp);
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}
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if (TmpInst.getOpcode() == X86::LEA64_32r) {
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// Should handle the 'subreg rewriting' for the lea64_32mem operand.
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switch (TmpInst.getOpcode()) {
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case X86::LEA64_32r:
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// Handle the 'subreg rewriting' for the lea64_32mem operand.
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lower_lea64_32mem(&TmpInst, 1);
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break;
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case X86::CALL64pcrel32:
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case X86::CALLpcrel32:
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case X86::TAILJMPd:
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// The target operand is pc-relative, not an absolute reference.
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// FIXME: this should be an operand property, not an asm format modifier.
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;
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}
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// FIXME: Convert TmpInst.
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@ -348,7 +348,6 @@ void X86ATTAsmPrinter::printOperand(const MCInst *MI, unsigned OpNo,
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}
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void X86ATTAsmPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
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const char *Modifier = 0;
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bool NotRIPRel = false;
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const MCOperand &BaseReg = MI->getOperand(Op);
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@ -368,28 +367,20 @@ void X86ATTAsmPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
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}
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if (IndexReg.getReg() || BaseReg.getReg()) {
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unsigned ScaleVal = MI->getOperand(Op+1).getImm();
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unsigned BaseRegOperand = 0, IndexRegOperand = 2;
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// There are cases where we can end up with ESP/RSP in the indexreg slot.
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// If this happens, swap the base/index register to support assemblers that
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// don't work when the index is *SP.
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// FIXME: REMOVE THIS.
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if (IndexReg.getReg() == X86::ESP || IndexReg.getReg() == X86::RSP) {
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assert(ScaleVal == 1 && "Scale not supported for stack pointer!");
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abort();
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//std::swap(BaseReg, IndexReg);
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//std::swap(BaseRegOperand, IndexRegOperand);
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}
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assert(IndexReg.getReg() != X86::ESP && IndexReg.getReg() != X86::RSP);
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O << '(';
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if (BaseReg.getReg())
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printOperand(MI, Op+BaseRegOperand, Modifier);
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printOperand(MI, Op);
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if (IndexReg.getReg()) {
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O << ',';
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printOperand(MI, Op+IndexRegOperand, Modifier);
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if (ScaleVal != 1)
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printOperand(MI, Op+2);
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if (MI->getOperand(Op+1).getImm() != 1)
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O << ',' << ScaleVal;
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}
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O << ')';
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