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Fix ScheduleDAGRRList::CopyAndMoveSuccessors' handling of nodes
with multiple chain operands. This can occur when the scheduler has added chain operands to a node that already has a chain operand, in order to handle physical register dependencies. This fixes an llvm-gcc bootstrap failure on x86-64 introduced in r66058. llvm-svn: 66240
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@ -410,7 +410,7 @@ SUnit *ScheduleDAGRRList::CopyAndMoveSuccessors(SUnit *SU) {
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NewSU->isCommutable = true;
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ComputeLatency(NewSU);
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SDep ChainPred;
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SmallVector<SDep, 4> ChainPreds;
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SmallVector<SDep, 4> ChainSuccs;
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SmallVector<SDep, 4> LoadPreds;
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SmallVector<SDep, 4> NodePreds;
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@ -418,7 +418,7 @@ SUnit *ScheduleDAGRRList::CopyAndMoveSuccessors(SUnit *SU) {
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for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();
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I != E; ++I) {
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if (I->isCtrl())
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ChainPred = *I;
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ChainPreds.push_back(*I);
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else if (I->getSUnit()->getNode() &&
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I->getSUnit()->getNode()->isOperandOf(LoadNode))
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LoadPreds.push_back(*I);
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@ -433,17 +433,17 @@ SUnit *ScheduleDAGRRList::CopyAndMoveSuccessors(SUnit *SU) {
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NodeSuccs.push_back(*I);
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}
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if (ChainPred.getSUnit()) {
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RemovePred(SU, ChainPred);
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for (unsigned i = 0, e = ChainPreds.size(); i != e; ++i) {
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const SDep &Pred = ChainPreds[i];
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RemovePred(SU, Pred);
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if (isNewLoad)
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AddPred(LoadSU, ChainPred);
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AddPred(LoadSU, Pred);
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}
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for (unsigned i = 0, e = LoadPreds.size(); i != e; ++i) {
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const SDep &Pred = LoadPreds[i];
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RemovePred(SU, Pred);
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if (isNewLoad) {
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if (isNewLoad)
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AddPred(LoadSU, Pred);
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}
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}
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for (unsigned i = 0, e = NodePreds.size(); i != e; ++i) {
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const SDep &Pred = NodePreds[i];
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35
test/CodeGen/X86/2009-03-05-burr-list-crash.ll
Normal file
35
test/CodeGen/X86/2009-03-05-burr-list-crash.ll
Normal file
@ -0,0 +1,35 @@
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; RUN: llvm-as < %s | llc
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
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target triple = "x86_64-unknown-linux-gnu"
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external global i32 ; <i32*>:0 [#uses=1]
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declare i64 @strlen(i8* nocapture) nounwind readonly
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define fastcc i8* @1(i8*) nounwind {
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br i1 false, label %3, label %2
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; <label>:2 ; preds = %1
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ret i8* %0
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; <label>:3 ; preds = %1
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%4 = call i64 @strlen(i8* %0) nounwind readonly ; <i64> [#uses=1]
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%5 = trunc i64 %4 to i32 ; <i32> [#uses=2]
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%6 = load i32* @0, align 4 ; <i32> [#uses=1]
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%7 = sub i32 %5, %6 ; <i32> [#uses=2]
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%8 = sext i32 %5 to i64 ; <i64> [#uses=1]
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%9 = sext i32 %7 to i64 ; <i64> [#uses=1]
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%10 = sub i64 %8, %9 ; <i64> [#uses=1]
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%11 = getelementptr i8* %0, i64 %10 ; <i8*> [#uses=1]
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%12 = icmp sgt i32 %7, 0 ; <i1> [#uses=1]
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br i1 %12, label %13, label %14
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; <label>:13 ; preds = %13, %3
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br label %13
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; <label>:14 ; preds = %3
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%15 = call noalias i8* @make_temp_file(i8* %11) nounwind ; <i8*> [#uses=0]
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unreachable
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}
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declare noalias i8* @make_temp_file(i8*)
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